tag: EDA

Steep Spike For Chip Complexity And Unknowns
By Ed Sperling - 05 May, 2021 - Comments: 0

Cramming more and different kinds of processors and memories onto a die or into a package is causing the number of unknowns and the complexity of those designs to skyrocket. There are good reasons for combining all of these different devices into an SoC or advanced package. They increase functionality and can offer big improvements in performance and power that are no longer available just b... » read more

Roadblocks For ML in EDA
By Brian Bailey - 28 Apr, 2021 - Comments: 1

Is EDA a suitable space for utilizing machine learning (ML)? The answer depends on a number of factors, including where exactly it is being applied, how much support there is from the industry, and whether there are demonstrable advantages. Exactly where ML will play a role has yet to be decided. Replacing existing heuristics with machine learning, for example, would require an industry-wide... » read more

RISC-V Targets Data Centers
By Ann Mutschler - 22 Apr, 2021 - Comments: 0

RISC-V vendors are beginning to aim much higher in the compute hierarchy, targeting data centers and supercomputers rather than just simple embedded applications on the edge. In the past, this would have been nearly impossible for a new instruction set architecture. But a growing focus on heterogeneous chip integration, combined with the reduced benefits of scaling and increasing demand for ... » read more

EDA, IP Revenues Soar
By Ed Sperling - 13 Apr, 2021 - Comments: 1

EDA and IP revenues increased 15.4% to $3.032 billion in Q4 2020, according to a just-released report, with huge increases reported in China and India, and a solid double-digit increase in the Americas. EDA/IP revenue from China increased 66.4% in Q4 EDA/IP compared with the same period in 2019, and for the 2020 calendar year it was up 52.3%. India's spending was up 32% for the quarter. And ... » read more

Many Chiplet Challenges Ahead
By Brian Bailey - 12 Apr, 2021 - Comments: 0

Over the past couple of months, Semiconductor Engineering has looked into several aspects of 2.5D and 3D system design, the emerging standards and steps that the industry is taking to make this more broadly adopted. This final article focuses on the potential problems and what remains to be addressed before the technology becomes sustainable to the mass market. Advanced packaging is seen as ... » read more

Stuck In A Rut
By Brian Bailey - 25 Mar, 2021 - Comments: 4

In the DVCon panel session about open-source verification, the first part of which has been published along with this blog, you will read about a fiery debate between the panelists. This is regarding the ability of the EDA industry to innovate. On one side is the accusation that there has been no real innovation since 1988. On the other side, there have been fantastic advances have been made th... » read more

Verification In The Open Source Era
By Brian Bailey - 25 Mar, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss what open source verification means today and what it should evolve into, with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Ashish Darbari, CEO of Axiomise; Simon Davidmann, CEO of Imperas Software; Serge Leef, program manager in the Microsystems Technology Office at DARPA; Tao Liu, staff hardwa... » read more

Waiting For Chiplet Standards
By Brian Bailey - 25 Mar, 2021 - Comments: 2

The need and desire for chiplets is increasing, but for most companies that shift will happen slowly until proven standards are in place. Interoperability and compatibility depend on many layers and segments of the supply chain coming to agreement. Unfortunately, fragmented industry requirements may lead to a plethora of solutions. Standards always have enabled increasing specialization. ... » read more

Ten Reasons 3D-IC Will Profoundly Change The Way You Design Electronics
By Marc Swinnen - 11 Mar, 2021 - Comments: 3

The history of electronic design has been defined by repeated waves of major technological change and accompanying business realignment. Many companies have foundered and disappeared when they were unable to anticipate and adjust to these powerful forces of change. Consequently, I am not alone in believing that now is the time to get ready for the next significant change to your electronic desi... » read more

Design Issues For Chips Over Longer Lifetimes
By Ed Sperling - 08 Mar, 2021 - Comments: 0

Semiconductor Engineering sat down to discuss the myriad challenges associated with chips used in complex systems over longer periods of time them with Jean-Marie Brunet, senior director for the Emulation Division at Siemens EDA; Frank Schirrmeister, senior group director for solution marketing at Cadence; Maurizio Griva, R&D Manager at Reply; and Laurent Maillet-Contoz, system and architec... » read more

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