Generative AI: Transforming Inference At The Edge


The world is witnessing a revolutionary advancement in artificial intelligence with the emergence of generative AI. Generative AI generates text, images, or other media responding to prompts. We are in the early stages of this new technology; still, the depth and accuracy of its results are impressive, and its potential is mind-blowing. Generative AI uses transformers, a class of neural network... » read more

Developing Energy-Efficient AI Accelerators For Intelligent Edge Computing And Data Centers


Artificial intelligence (AI) accelerators are deployed in data centers and at the edge to overcome conventional von Neumann bottlenecks by rapidly processing petabytes of information. Even as Moore’s law slows, AI accelerators continue to efficiently enable key applications that many of us increasingly rely on, from ChatGPT and advanced driver assistance systems (ADAS) to smart edge device... » read more

Semiconductor Industry Is Pulling AI Across A Diversity Of End Uses And Applications


Earlier this month, I had the pleasure of joining a group of industry peers during SEMICON West and the Design Automation Conference in San Francisco for an enlightening panel discussion that we organized titled, “How AI Is Reinventing the Semiconductor Industry Inside and Out.” Moderated by Gartner, I was joined on the panel by senior executives from Advantest, Synopsys and the TinyML Foun... » read more

A Packet-Based Architecture For Edge AI Inference


Despite significant improvements in throughput, edge AI accelerators (Neural Processing Units, or NPUs) are still often underutilized. Inefficient management of weights and activations leads to fewer available cores utilized for multiply-accumulate (MAC) operations. Edge AI applications frequently need to run on small, low-power devices, limiting the area and power allocated for memory and comp... » read more

Edge Computing: Four Smart Strategies For Safeguarding Security And User Experience


It is a brave new world for enterprise networks. Smart devices are getting smarter, and edge computing is emerging as a viable way to reduce latency and improve performance. But as network architectures grow increasingly amorphous, what kind of impact will this have on security and performance? Download this white paper to discover how you can boost security, ensure quality of service, and futu... » read more

How eMRAM Addresses The Power Dilemma In Advanced-Node SoCs


By Rahul Thukral and Bhavana Chaurasia Our intelligent, interconnected, data-driven world demands more computation and capacity. Consider the variety of smart applications we now have. Cars can transport passengers to their destinations using local and remote AI decision-making. Robot vacuum cleaners keep our homes tidy, and smartwatches can detect a fall and call emergency services. With hi... » read more

100G Ethernet IP For Edge Computing


The presence of Ethernet in our lives has paved the way for the emergence of the Internet of Things (IoT). Ethernet has connected everything around us and beyond, from smart homes and businesses, to industries, schools, and governments. This specification is even found in our vehicles, facilitating communication between internal devices. Ethernet has enabled high-performance computing data cent... » read more

Designing for Data Flow


Movement and management of data inside and outside of chips is becoming a central theme for a growing number of electronic systems, and a huge challenge for all of them. Entirely new architectures and techniques are being developed to reduce the movement of data and to accomplish more per compute cycle, and to speed the transfer of data between various components on a chip and between chips ... » read more

Looking Inside Of Chips


Shai Cohen, co-founder and CEO of proteanTecs, sat down with Semiconductor Engineering to talk about how to boost reliability and add resiliency into chips and advanced packaging. What follows are excerpts of that conversation. SE: Several years ago, no one was thinking about on-chip monitoring. What's changed? Cohen: Today it is obvious that a solution is needed for optimizing performanc... » read more

Improving Chip Efficiency, Reliability, And Adaptability


Peter Schneider, director of Fraunhofer Institute for Integrated Circuits' Engineering of Adaptive Systems Division, sat down with Semiconductor Engineering to talk about new models and approaches for ensuring the integrity and responsiveness of systems, and how this can be done within a given power budget and at various speeds. What follows are excerpts of that conversation. SE: Where are y... » read more

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