Meeting High-Frequency And Power Density Challenges With Flip Chip MLF Packaging


The relentless march of semiconductor scaling continues to reshape the packaging landscape, driven by Moore’s Law and the demand for higher performance in increasingly compact form factors [1]. Over the past two decades transistor density has increased exponentially, with leading-edge processes now achieving densities exceeding 100 million transistors per square millimeter. Certain applica... » read more

Noise: A Chip Killer


Noise has always been important to communications experts, but it's quickly becoming an issue that every semiconductor designer has to contend with. Some chips already have been compromised. Noise can be defined as any deviation from the ideal that can impact intended functionality. When it comes to semiconductors, that could mean the ability to reliably extract a signal value at the intende... » read more

Multi-Die Assemblies Complicate Parasitic Extraction


The shift from planar designs to multi-die assemblies with complex interconnects is transforming what had become almost an afterthought in the design process into a first-order challenge. Parasitics include things like inductance, capacitance, and resistance, which have become more problematic at advanced nodes due to increasing logic density, thinner interconnects and insulators, and a spik... » read more

Managing EMI in High-Density Integration


The relentless drive for higher performance and increased functional integration has ushered in new challenges for managing electromagnetic interference (EMI) in densely packed mixed-signal environments. Integrating analog, RF, and digital circuits into a single system-on-chip (SoC) or advanced package requires solutions that reduce system size and improve performance. However, this tight in... » read more

Research Bits: November 14


Solid-state thermal transistor for heat management Researchers from University of California Los Angeles created a stable and fully solid-state thermal transistor that uses an electric field to control a semiconductor device’s heat movement. It is compatible with integrated circuits in semiconductor manufacturing processes. The team’s design incorporates the field effect on charge dynamics... » read more

Reducing Noise Issues In Microcontroller Systems: Part 1


In my ideal digital world, of which I often dream, signal voltage margins are always positive, signal timing margins are always positive, power supply voltages are always within the operating voltage range, and our environment is completely benign. Unfortunately, none of us live in this ideal world, no matter how much I would like to. The real world is dirty and noisy, and the power distribu... » read more

Research Bits: Feb. 6


Pillars for chiplet integration Researchers from the Tokyo Institute of Technology proposed a new chiplet integration technology called Pillar-Suspended Bridge (PSB), which they say is a simpler method of chip-to-chip connection compared to silicon interposers and redistribution layers. In the PSB, only a pillar-shaped metal structure called a "MicroPillar" is interposed at the connection b... » read more

EMC Pre-Compliance Fundamentals


Once you’ve designed your electronic product, it’s time to release it to market, right? Well, not exactly. As with any product development, you need to first test the device you’re designing to validate that it behaves as expected. One such important test that all electronic devices must eventually pass are EMI (electromagnetic interference) compliance tests. Passing EMI tests d... » read more

Electromagnetic Simulation And 3D-IC Interposers


By Matt Commens, Juliano Mologni, and Pete Gasperini Today’s 3D integrated circuit (3D-IC) technology is the culmination of 40 years of research in universities and laboratories scattered across the globe. Beginning with dynamic random-access memory (DRAM) deployments that appeared on the market a decade ago, 3D-IC has since expanded its reach. It is now decisively beginning to achieve the... » read more

Parasitic Characterization Comes To Power Design Simulation


Two power design challenges are taking teams into unfamiliar territory. Wide bandgap (WBG) semiconductors target greater efficiency and density. Stricter EMI compliance regulations now come standard in mission-critical industries. Power design practices are still catching up. Simulation often takes a back seat to respinning hardware prototypes until success. What’s missing that could make sim... » read more

← Older posts