Week In Review: Design, Low Power


Tools, IP, design Codasip launched a new organization within the company to support the development and commercialization of technical innovations in key applications including security, functional safety, and AI/ML. "As semiconductor scaling is showing its limits, there is an obvious need for new ways of thinking. We will be working with universities, research institutes and strategic partner... » read more

Hot Trends In Semiconductor Thermal Management


Increasing thermal challenges, as the industry moves into 3D packaging and continues to scale digital logic, are pushing the limits of R&D. The basic physics of having too much heat trapped in too small a space is leading to tangible problems, like consumer products that are too hot to hold. Far worse, however, is the loss of power and reliability, as overheated DRAM has to continually r... » read more

Chip Industry’s Technical Paper Roundup: Oct 18


New technical papers added to Semiconductor Engineering’s library this week. [table id=57 /] » read more

Thermal Scanning Probe Lithography


A new technical paper titled "Edge-Contact MoS2 Transistors Fabricated Using Thermal Scanning Probe Lithography" was published by researchers at École Polytechnique Fédérale de Lausanne (EPFL). "Thermal scanning probe lithography (t-SPL) is a gentle alternative to the typically used electron beam lithography to fabricate these devices avoiding the use of electrons, which are well known to... » read more

Foundational Changes In Chip Architectures


We take many things in the semiconductor world for granted, but what if some of the decisions made decades ago are no longer viable or optimal? We saw a small example with finFETs, where the planar transistor would no longer scale. Today we are facing several bigger disruptions that will have much larger ripple effects. Technology often progresses in a linear fashion. Each step provides incr... » read more

Distilling The Essence Of Four DAC Keynotes


Chip design and verification are facing a growing number of challenges. How they will be solved — particularly with the addition of machine learning — is a major question for the EDA industry, and it was a common theme among four keynote speakers at this month's Design Automation Conference. DAC has returned as a live event, and this year's keynotes involved the leaders of a systems comp... » read more

Zero-Bias Power-Detector Circuits based on MoS2 Field-Effect Transistors on Wafer-Scale Flexible Substrates


Abstract: "We demonstrate the design, fabrication, and characterization of wafer-scale, zero-bias power detectors based on two-dimensional MoS2 field effect transistors (FETs). The MoS2 FETs are fabricated using a wafer-scale process on 8 μm thick polyimide film, which in principle serves as flexible substrate. The performances of two CVD-MoS2 sheets, grown with different processes and showi... » read more

Label-Free C-Reactive Protein Si Nanowire FET Sensor Arrays With Super-Nernstian Back-Gate Operation


Abstract: "We present a CMOS-compatible double gate and label-free C-reactive protein (CRP) sensor, based on silicon on insulator (SOI) silicon nanowires arrays. We exploit a reference subtracted detection method and a super-Nernstian internal amplification given by the double gate structure. We overcome the Debye screening of charged CRP proteins in solutions using antibodies fragments as c... » read more

Power/Performance Bits: Feb. 7


Stopping interference in integrated photonics Researchers at EPFL and Purdue University combined integrated photonics and MEMS to develop an electrically driven optical isolator-on-a-chip that transmits light in only one direction. Optical isolators are useful to prevent reflected light from other components compromising or interfering with an on-chip laser’s performance. They are often c... » read more

Power/Performance Bits: June 15


Low-loss photonic IC Researchers at EPFL built a photonic integrated circuit with ultra-low loss. The team focused on silicon nitride (Si3N4), which has orders of magnitude lower optical loss compared to silicon. It is used in low-loss applications such as narrow-linewidth lasers, photonic delay lines, and nonlinear photonics. In applying the material to photonic ICs, they took advantage... » read more

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