tag: eSilicon

What’s the cheapest package that will work?
By Javier DeLaCruz - 16 Dec, 2010 - Comments: 0

By Javier DeLaCruz, So often, I come across questions from customers asking what’s the lowest cost package technology that will work. The package by itself should not be the singular focus when considering the lowest-cost solution for a new ASIC. The best approach is to take a few steps back and consider the system and what would work best for that given system, from a variety of standpoint... » read more

Experts At The Table: IP Integration Hurdles
By Ed Sperling - 10 Dec, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss IP integration issues with Ken Brock, senior staff product marketing manager for logic libraries in Synopsys’ Solutions Group; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversati... » read more

Experts At The Table: IP Integration Hurdles
By Ed Sperling - 02 Dec, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss IP integration issues with Ken Brock, senior staff product marketing manager for logic libraries in Synopsys’ Solutions Group; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta; and Jim McCanny, CEO of Altos Design Automation. What follows are excerpts of that conversatio... » read more

The Trouble With Semiconductor IP
By Ed Sperling - 01 Dec, 2010 - Comments: 0

Low-Power Engineering takes a poll of the big problem with IP and how to solve it from Ken Brock, senior staff product marketing manager at Synopsys; Kalar Rajendiran, senior director of marketing at eSilicon; Mike Gianfagna, vice president of marketing at Atrenta, and Jim McCanny, CEO of Altos Design. [youtube vid=b7wnkY_rU04] » read more

Just Kidding
By Jack Harding - 18 Nov, 2010 - Comments: 0

By Jack Harding I can remember back to 1995 and the first time I heard Joe Costello at Cadence speak publicly about the “disaggregation of the supply chain.” Disaggregation? Was that even a word in Webster’s Dictionary? It didn’t matter because, like many other concepts championed by Joe, it was the word every journalist and analyst in the semiconductor space was using to describe t... » read more

The Growing Need For Concurrent Design
By Ed Sperling - 21 Oct, 2010 - Comments: 0

By Ed Sperling The move toward concurrent design is escalating at advanced nodes, driven more by the need to ensure that everything works than previous efforts aimed at efficiency and time-to-market. While the concept has surfaced before in limited doses—engineers and EDA companies have been talking about doing more things simultaneously for the better part of a decade—there are some in... » read more

The Future Of 3D Stacking
By Ed Sperling - 21 Oct, 2010 - Comments: 0

By Ed Sperling Despite concerns about the lack of tools, an unstable process, questionable interconnects, thermal overloads and electrostatic discharge, 3D stacking appears to be making headway. At the very least, lots of companies of all sizes are betting heavily that it will succeed. The first wave, which is expected to start showing up late next year, will likely come from a handful of t... » read more

Moving To Open-Source Software
By Ann Mutschler - 23 Sep, 2010 - Comments: 0

By Ann Steffora Mutschler With the typical cost of software accounting for 40% to 60% of an SoC, semiconductor OEMs are under more pressure than ever to meet margins. As a result, they are drawing on their ecosystem partners to provide a more complete foundation including hardware, software, FPGA prototypes, verification IP and virtual models, as well as an increasing demand for open source so... » read more

What’s With That Big Package?
By Javier DeLaCruz - 23 Sep, 2010 - Comments: 0

By Javier DeLaCruz As SerDes data rates have been going up for years, and 10-Gbps interfaces have been becoming commonplace, I figured a few years ago that pin counts on packages would start going down. Boy, was I wrong on that prediction! The trend instead was to put more of those high-speed interfaces on devices. For years, a 45×45mm body size was really the upper limit on organic f... » read more

Best Practices In Team Building
By Ed Sperling - 26 Aug, 2010 - Comments: 0

By Ed Sperling Putting analog and digital engineers in the same room used to elicit strange looks and under-the-breath comments, but most companies have gotten beyond that stage. Now the question is how to pair them up effectively, get them all on the same team—sometimes even with software engineers thrown into the mix—while still getting a product out the door on time. This is easier s... » read more

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