tag: eSilicon

Journey To The Center Of The Ecosystem
By Ed Sperling - 14 Jan, 2010 - Comments: 0

From the outside it looks like business as usual, but the race for board seats on the GSA has become particularly competitive this year. GSA originally was created as an organization for fabless companies, but you wouldn’t know that looking at its membership roster. It has evolved into a who’s who of the entire semiconductor supply chain, including everyone from foundries like TSMC and... » read more

Coming Of Age
By Jack Harding - 17 Dec, 2009 - Comments: 0

By Jack Harding I recently participated in a panel hosted by TSMC.  The other panelists represented EDA, IP and Foundry market segments. We were asked to comment on new business models as a means to facilitate more design-starts in companies large and small and, otherwise, make it easier to be in this business with increasing NREs and greater complexity. To my delight the EDA guy talked... » read more

Stacked Dies Gain Attention, But So Far Little Traction
By Ed Sperling - 17 Dec, 2009 - Comments: 0

By Ed Sperling For the better part of two decades there has been a steady stream of predictions about the abrupt end of Moore’s Law, but it now appears the formula for doubling the number of transistors on a die every couple years will simply dissipate rather than fall off a cliff. While companies such as Intel and IBM continue to develop road maps that extend their road maps all the wa... » read more

It’s All About Attitude
By Jack Harding - 19 Nov, 2009 - Comments: 0

By Jack Harding When I started my career at IBM, one of the favorite sales lines we used was, “No one ever lost their job because they chose IBM.” In the burgeoning business computer market, that was true. Why? It wasn’t the size of the company. Actually, we were forbidden to link customer success with IBM’s “bigness,” which was an artifact of the Consent Decree with the U.S. Dep... » read more

The Five Percent Solution
By Jack Harding - 29 Oct, 2009 - Comments: 0

By Jack Harding When it comes to internal operations, “Do it yourself is dead.” By internal operations I mean all those activities from netlist to EOL (end of life). After all, nobody makes their own EDA tools or wafers. So, why are there a thousand companies with teams of 5 to 200 all doing the same job and, in many cases, poorly? How good can you be at making one or two 65 or 40 nm ch... » read more

Outsourcing’s New Face
By Ed Sperling - 29 Oct, 2009 - Comments: 0

By Ed Sperling As the semiconductor industry digs out from one of the worst downturns in decades, the business of semiconductor design and engineering is changing. While the architecture and features are still being developed by chip companies, the actual work of developing the chip increasingly is being done by third parties. Outsourcing is hardly new concept in business. In the early pa... » read more

Experts At The Table: What’s Next?
By Ed Sperling - 15 Oct, 2009 - Comments: 0

Low-Power Design sat down with Leon Stok, EDA director for IBM’s System & Technology Group; Antun Domic, senior vice president and general manager of Synopsys’ Implementaton Group; Prasad Subramaniam, vice president of design technology at eSilicon, and Bernard Murphy, chief technology officer at Atrenta. What follows are excerpts of that conversation. By Ed Sperling LPD: Where... » read more

Experts At The Table: What’s Next?
By Ed Sperling - 02 Oct, 2009 - Comments: 0

Low-Power Design sat down with Leon Stok, EDA director for IBM’s System & Technology Group; Antun Domic, senior vice president and general manager of Synopsys’ Implementaton Group; Prasad Subramaniam, vice president of design technology at eSilicon, and Bernard Murphy, chief technology officer at Atrenta. What follows are excerpts of that conversation. LPD: What will happen with ... » read more

Moore’s Law vs. Low Power
By Ed Sperling - 17 Sep, 2009 - Comments: 0

By Ed Sperling Moore’s Law and low-power engineering are natural-born enemies, and this dissension is becoming more obvious at each new process node as the two forces are pushed closer together. The basic problem is that shrinking transistors and line widths between wires opens up far more real estate on a chip, which encourages chip architects and marketing chiefs at chipmakers to take... » read more

Experts At The Table: What’s Next?
By Ed Sperling - 17 Sep, 2009 - Comments: 0

Low-Power Design sat down with Leon Stok, EDA director for IBM’s System & Technology Group; Antun Domic, senior vice president and general manager of Synopsys’ Implementaton Group; Prasad Subramaniam, vice president of design technology at eSilicon, and Bernard Murphy, chief technology officer at Atrenta. What follows are excerpts of that conversation. LPD: What are we facing at ... » read more

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