The Upside Of Through-Silicon Vias

By Katherine Derbyshire - 17 Oct, 2013 - Comments: 0

Through-silicon vias (TSVs) for 3D integration are superficially similar to damascene copper interconnects for integrated circuits. Both etch the via, into either silicon or a dielectric, line it with a barrier against copper diffusion, then deposit a seed layer prior to filling the via with copper using some form of aqueous deposition. In both processes, the integrity of the diffusion barrier ... » read more

Applied To Buy TEL

By Mark LaPedus - 24 Sep, 2013 - Comments: 0

In a deal that could shake-up the fab tool landscape, Applied Materials has announced a definitive agreement to acquire rival Tokyo Electron Ltd. (TEL) in a stock deal valued at around $9.3 billion. Under the terms of the blockbuster deal, Applied Materials will own approximately 68% of the new company and TEL will own about 32%. The combined entities will have a new name, dual headquarter... » read more

A Study Of Model-Based Etch Bias Retarget For OPC

By Various Writers - 15 Aug, 2013 - Comments: 0

Model-based optical proximity correction is usually used to compensate for the pattern distortion during the microlithography process. Currently, almost all the lithography effects, such as the proximity effects from the limited NA, the 3D mask effects due to the shrinking critical dimension, the photo resist effects, and some other well known physical process, can all be well considered into m... » read more

Trickle Down Equipment Economics

By Jeff Chappell - 16 May, 2013 - Comments: 0

By Jeff Chappell By now, with the rise of China as a center of manufacturing, everyone in the chip industry has no doubt heard of the supposed Chinese curse, "May you live in interesting times." It's practically cliché. The thing is, the next two industry cycles may indeed prove interesting for the used equipment market. At the moment, everyone is tired of interesting times, and those in ... » read more

Optical Lithography, Take Two

By Mark LaPedus - 21 Feb, 2013 - Comments: 0

By Mark LaPedus It’s the worst-kept secret in the industry. Extreme ultraviolet (EUV) lithography has missed the initial stages of the 10nm logic and 1xnm NAND flash nodes. Chipmakers hope to insert EUV by the latter stages of 10nm or by 7nm, but vendors are not counting on EUV in the near term and are preparing their back-up plans. Barring a breakthrough with EUV or other technology, IC ... » read more

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tag: etch

The Upside Of Through-Silicon Vias

Applied To Buy TEL

A Study Of Model-Based Etch Bias Retarget For OPC

Trickle Down Equipment Economics

Optical Lithography, Take Two

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