Applied To Buy TEL


In a deal that could shake-up the fab tool landscape, Applied Materials has announced a definitive agreement to acquire rival Tokyo Electron Ltd. (TEL) in a stock deal valued at around $9.3 billion.

Under the terms of the blockbuster deal, Applied Materials will own approximately 68% of the new company and TEL will own about 32%.  The combined entities will have a new name, dual headquarters in Tokyo and Santa Clara, Calif. , a dual listing on the Tokyo Stock Exchange and the NASDAQ, and will be incorporated in The Netherlands.

Tetsuro Higashi, chairman, president and CEO of TEL, will serve as chairman of the combined companies. Gary Dickerson, the new president and CEO of Applied Materials, will serve as chief executive of the new entity.

This combination, which has been approved by the boards of both companies, brings together the world’s second and third largest fab tool vendors with a combined market capitalization of approximately $29 billion.  Prior to the deal, ASML Holding was the world’s largest fab tool vendor in terms of sales, followed in order by Applied Materials and TEL, according to Advanced Research Japan.

T he deal follows a flurry of acquisitions in the semiconductor equipment market. In recent times, both Applied and TEL have separately been on acquisition sprees to bolster their product lines. In this and other cases, vendors are consolidating and combining their resources to address some new and expensive tool markets, such as 3D NAND, 450mm, high-mobility finFETs, stacked die and others.

The proposed Applied-TEL duo would have the economies of scale to accelerate their efforts in these markets.  Another such example is Lam Research’s recent move to buy Novellus, which, in turn, propelled Lam’s efforts in the 450mm and stack die tool markets.  In fact, the move by Lam, and now the proposed Applied-TEL duo, underscores a trend in which chipmakers are relying more on processes like etch and deposition—and not lithography—to develop new device architectures.

Still, the integration of Applied and TEL is expected to be challenging. The two companies, which have been battling each other in the market for years, reside in different locations and have distinct corporate cultures.  “(The Applied-TEL deal is) huge if it goes through anti-trust regulators,” said David Rubenstein, an analyst with Advanced Research Japan. “That’s a big if.”

Applied Materials and TEL have a large portfolio of complementary, and overlapping, product lines.  Applied is the world’s largest supplier of tools for CMP, ion implantation, PVD and RTP. The company also sells tools in other markets, such as ALD, electroplating, epi, inspection/metrology and others.

For its part, TEL is the world’s largest player in wafer probe and wafer track. It is also strong in the fragmented wafer cleaning market. Both Applied Materials and TEL must sort out their respective CVD and etch lines, as the companies have some competing products. The two companies also have various tools for flat-panel displays and solar. “We are creating a global innovator in precision materials engineering and patterning that provides our new company with significant opportunities to solve our customers’ high-value problems better, faster and at lower cost,” Applied’s Dickerson said in a statement.

Analysts are bullish about the Applied-TEL deal. “The two companies have little product overlap between them, making this a complementary acquisition that could soak up about 50% of wafer fab equipment spending by 2017,” said Jagadish Iyer, an analyst with Piper Jaffray. “We see this deal making the combined company’s presence at Intel, Samsung and TSMC much more entrenched while also creating greater presence in the display market.”

Paradigm shift

The deal also reflects a paradigm shift taking place in the semiconductor market. At one time, lithography was the driving force behind chip scaling, but lately, this technology is lagging and threatens the traditional cost-per-transistor curve. In reality, the shift to new materials and processes are keeping the industry on Moore’s Law. Going forward, Applied and TEL, as well as KLA-Tencor, Lam and others will play a more important role in chip fabrication. “We believe new materials and gate designs are becoming just as important as conventional lithography shrinks,” said Weston Twigg, an analyst with Pacific Crest Securities.

Needless to say, the cost-of-ownership for lithography is becoming problematic–even for chipmakers with deep pockets. TSMC, for one, has said that lithography represents 50% of its capital spending, according to Pacific Crest Securities. In fact, one 193nm immersion lithography tool costs around $60 million, while EUV scanners may run as much as $135 million each, according to the firm.

Chipmakers, according to Twigg, are pushing back as lithography costs continue to soar out of control. “EUV lithography can achieve high enough resolution to eliminate some expensive pitch splitting steps that require two or more immersion lithography tools,” Twigg said. “However, we now believe that customers are developing creative solutions to slow the march to quadruple patterning, and that the lithography opportunity could be lower for ASML if EUV adoption continues to be delayed.”

Pacific Crest lists three main areas where chipmakers are circumventing lithography and moving towards more creative approaches–3D NAND; finFETs; and optimized chip designs.  Another example is 3D stacked-die using through silicon vias (TSVs).

Samsung Electronics, for one, has begun shipping the industry’s first 3D NAND device, a 24-level, 128-gigabit chip. Micron and SK Hynix shortly will ship their respective 3D NAND devices.  But the Toshiba-SanDisk duo is the lone holdout, as the joint venture partners will extend planar NAND as long as possible before rolling out a 3D NAND device in 2016.

In Samsung’s 3D NAND device, NAND layers are stacked using an oxide and nitride deposition process. Then, the nitride is removed by an etch process. Finally, the bit and word lines are created using a tungsten fill. In other words, 3D NAND vendors will move from a costly lithography-centric production environment to a less-expensive etch/deposition flow. “The overall cost of the tools will be cheaper with 3D NAND,” said Gill Lee, a senior director and principal member of the technical staff at Applied Materials, in a recent interview. “This is mainly driven by the difference in the number of critical lithography and double-patterning steps.”

Chipmakers are also circumventing high lithography costs by shifting to new materials and gate structures. “Foundries are extending the 20nm node for up to four years by adding a finFET gate, and few, if any new litho tools are needed to accomplish this,” said Pacific Crest’s Twigg. “While the finFET node will be called 16nm or 14nm, the performance gains are achieved through new materials and gate design, not a conventional lithography shrink.”

New chip design methods are also changing the landscape. For example, Intel is making use of innovative designs to extend 193nm immersion down to the 10nm node. Intel hopes to use EUV at 7nm. “Intel is using gridded design layouts, allowing it to achieve conventional shrinks with a lower lithography burden than its competitors. As a result, Intel won’t need multiple double patterning steps until the 14nm node, while foundries need it earlier, at the 20nm node. If others adopt this effective design approach, it would be a negative trend for lithography,” Twigg added.

Reading the fine print

Meanwhile, under the terms of the Applied-TEL deal, the combined board will be made up of eleven directors with five directors appointed by each company and one additional director to be mutually agreed upon. Seven of the eleven directors will be independent. Bob Halliday of Applied Materials will serve as chief financial officer.

As part of the deal, TEL shareholders will receive 3.25 shares of the new company for every TEL share held. Applied Materials shareholders will receive one share of the new company for every Applied Materials share held.  he new company intends to commence a $3.0 billion stock repurchase program targeted to be executed within 12 months following the close of the transaction.  The closing of the transaction is subject to customary conditions, including approval by Applied Materials’ and TEL’s shareholders and review by regulators.  The companies expect the transaction to close in mid to second half of 2014.


Leave a Reply

(Note: This name will be displayed publicly)