tag: Ethernet

AI, GPU, And HPC Data Centers: The Infrastructure Behind Modern AI
By Vinod Khera - 12 Feb, 2026 - Comments: 0

Artificial intelligence (AI) is stretching compute infrastructure well beyond what traditional enterprise data centers were designed to handle. Modern AI training requires massively parallel compute, low-latency networking, high-throughput storage pipelines, and facility engineering that can safely support higher rack power densities than legacy environments. These demands are fueling the eme... » read more

Securing Terabit Ethernet Networks With 1.6T MACsec Security Modules
By Dana Neustadter - 08 Jan, 2026 - Comments: 0

By Dana Neustadter and Vincent van der Leest In the realm of high-performance computing (HPC) and data centers, Ethernet is one of the interfaces of choice due to its scalability, reliability, and broad industry support. Ethernet's ability to efficiently handle large volumes of data makes it ideal for HPC environments that require high-speed data transmission and seamless integration with ex... » read more

Designing for 448G: Modulation, DSP, and Channel Trade-offs in High-Speed SerDes
By Synopsys - 10 Dec, 2025 - Comments: 0

Discover practical solutions and engineering insights for deploying 448G SerDes in AI and HPC cluster networks. In this white paper, you’ll learn: The impact of retimed vs. unretimed host architectures on signal integrity and power Key trade-offs between PAM4 and PAM6 modulation Channel design simulations and DSP implications using real-world 448G topologies Equalization stra... » read more

Multiple AI Scale-Up Options Emerge
By Bryon Moyer - 13 Nov, 2025 - Comments: 0

Artificial intelligence (AI) workloads are very different from those traditionally run inside of data centers, and while the current infrastructure can accommodate those needs, there is a constant demand for higher performance and better power efficiency. It can take months to train a large language model, even with a huge number of processing elements. Typically this involves commandeering ... » read more

Enabling The 448G Era: System Architecture And Standards For Next-Gen AI Networks
By Synopsys - 15 Oct, 2025 - Comments: 0

As Artificial Intelligence (AI) and Machine Learning (ML) workloads continue to reshape data center infrastructure, the need for higher bandwidth and lower latency has accelerated the need for a next-generation Ethernet. This white paper examines the industry’s shift toward 448G signaling—driven by scale-up and scale-out AI cluster demands—and outlines the evolving system architecture... » read more

MACsec Fundamentals Securing Data in Motion: 2025
By Rambus - 03 Sep, 2025 - Comments: 0

For end-to-end security of data, it must be secured both when at rest (stored on a connected device) and when in motion (communicated between connected devices). For data at rest, a hardware root of trust anchored in silicon provides that foundation upon which all device security is built. Similarly, MACsec (Media Access Control) security anchored in hardware at the foundational communication l... » read more

Programmable Hardware Delivers 10,000X Improvement In Verification Speed Over Software For Forward Error Correction
By Tony Chan Carusone - 28 Aug, 2025 - Comments: 0

In the race to increase the speeds of wireline networking and communications, forward error correction (FEC) has become a vital part of the toolkit. To function effectively, especially with the increasing use of four-level pulse amplitude modulation (PAM4), high-speed protocols need FEC to avoid a rise in the number of reception errors. Each incremental increase in the transmitted symbol rate r... » read more

System-Level Design For 1.6 Tbps Interoperability In AI Data Centers
By Madhumita Sanyal - 14 Aug, 2025 - Comments: 0

By Madhumita Sanyal and Diwakar Kumaraswamy The rapid escalation of AI/ML workloads—driven by increasingly large language models—is reshaping high-performance computing and AI data center architectures. Real-time inference and large-scale training are pushing the limits of compute and interconnect performance. With model sizes and parameter counts doubling every 4–6 months, infrastruct... » read more

UEC-CBFC: Credit-Based Flow Control For Next-Gen Ethernet In AI And HPC
By Harinee Rathod - 14 Aug, 2025 - Comments: 0

For ages, Ethernet has been the backbone of networking — starting from simple web browsing to cloud computing, data centers, automobiles, and more. Ethernet has enabled countless innovations, and now, it's expanding to meet the demands of AI and HPC. As the world shifts toward these new technologies, new challenges are emerging. These include increased scale, higher bandwidth density, mult... » read more

UEC-LLR: The Future Of Loss Recovery In Ethernet For AI And HPC
By Krunal Patel - 31 Jul, 2025 - Comments: 0

As Artificial Intelligence (AI) and High-Performance Computing (HPC) systems become the backbone of modern data centers, they generate and consume a massive amount of data. Traditional Ethernet was not built for such high-bandwidth traffic. In HPCs and AI models, computations are distributed across the nodes and the data is shared in real time with low latency and lossless communication. As ... » read more

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