I Just Want Closure!

By Jean-Marie Brunet We all know it by now, but let’s say it one more time for the cameras—the level of complexity of closure at 20 nm and below is considerably higher than for any previous nodes. While the migration of manufacturing requirements into design started with a few suggested activities at 65 nm, such as recommended rules compliance, lithography checks, and critical area analysi... » read more

DFM Success At SMIC

Jeff Wilson As any integrated circuit (IC) designer knows, design rules are the “first line of defense” foundries provide in the effort to ensure all IC designs are ultimately manufacturable. Coming in a close second, design for manufacturing (DFM) rules enable designers to maximize design capabilities and performance while minimizing or optimizing the use of chip space. At today’s ad... » read more

A New World For Fill At N20

By Jeff Wilson and Jean-Marie Brunet There are many drastic changes required to design, verify, and manufacture semiconductors at the 20nm process node (N20). One of these is fill. At previous design nodes, fill was used just to ensure manufacturability by giving each layer (metal, poly, diffusion) an accepted density. At N20, fill is used to address many more manufacturing issues, and has bec... » read more

A Smart Filling Solution Yields Multiple Benefits

By Jeff Wilson, A return on investment doesn’t happen until customers actually buy your product, so the most fundamental goal for designers is getting their designs to market. While there are numerous steps along the way, one task that must be performed is adding fill to the design. Fill is like design rule checking (DRC)—it’s not an optional step, because it is needed to ensure the manu... » read more

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