Easing The Burden Of Early Bug Detection

By Rob van Blommestein - 26 Aug, 2021 - Comments: 0

Integrated circuit designers are under constant pressure to deliver bug free code that meets ever more rigorous requirements. It is well known that the more bugs that can be detected early in the development process, the faster and easier that development effort will be. However, early bug detection requires a verification overhead on the designer that can be onerous and impact the design proce... » read more

Formally Verifying SystemC/C++ Designs

By Rob van Blommestein - 29 Jul, 2021 - Comments: 0

We’re seeing an increase in the number of designs employing SystemC/C++. This isn’t surprising given the fact that specific use models have emerged to drive common design flows across engineering teams leading to the adoption of high-level synthesis (HLS) at many large semiconductor and electronic systems companies. These HLS tools are a popular method to rapidly generate design components ... » read more

Three Steps To ISO 26262 Fault Campaign Closure

By Jacob Wiltgen - 03 Jun, 2021 - Comments: 0

The complexity of automotive ICs continues to grow exponentially, challenging even the most veteran teams to deliver innovative products to market while simultaneously ensuring safety through the operational life of the product. This is the purpose of safety verification. Its primary objective is to understand whether the safety architecture sufficiently prevents random failures from violati... » read more

Trends In FPGA Verification Effort And Technology Adoption

By Harry Foster - 13 May, 2021 - Comments: 0

The more we know about the bigger picture, context, historical and projected trends, or simply how other people do the same thing we do, the more efficiently and successfully we can do our specific jobs. This perspective also informs the EDA industry in how to best assist and sustain the needs of the FPGA and ASIC engineering communities. Providing this kind of information is the reason we c... » read more

Unlock Your Vision… And A Bit Of EDA History

By McKenzie Ross - 29 Mar, 2021 - Comments: 0

Repetitive patterns and hardware designs have something in common: there may be more than meets the eye. Even simple designs can have corner cases that are hard to detect by code review alone, and the situation is even more complex if third-party or legacy IP is involved. What if the IP has a deliberately hidden function? This is where verification tools like OneSpin 360 come in, to remove huma... » read more

SolarWinds Attack Is A Cautionary Tale For Hardware And Its Supply Chain

By John Hallman - 04 Feb, 2021 - Comments: 0

The recent SolarWinds hacking incident that left many Fortune-500 companies and US government networks exposed is an interesting cautionary tale for unchecked software and hardware supply chain security vulnerabilities. The highly sophisticated software supply chain attack occurred in the SolarWinds Orion IT monitoring system. This system, used by over 33,000 companies, monitors performance acr... » read more

Using Formal To Verify Safety-Critical Hardware For ISO 26262

By OneSpin Solutions - 02 Dec, 2020 - Comments: 0

Automotive technology has come a long way since the days of the Ford Model T. Today's smart vehicles not only assist their drivers with tasks such as parking, lane management, and braking, but also function as a home away from home, with WiFi hotspots and sophisticated entertainment systems. These sophisticated features are made possible by increasingly complex electronic systems—systems that... » read more

IC Integrity Of Edge-Computing Processors: Meeting The Demands Of AI

By Rob van Blommestein - 18 Nov, 2020 - Comments: 0

If you ask most people, they would say that we’re living in an age of artificial intelligence (AI). But the reality is that we’re just getting started. The age of artificial intelligence is still in its infancy. So many of aspects of our lives involve technology but we’re still having to feed that technology or manually operate that technology in order get the results we want. Autonomous ... » read more

A Machine Learning-Based Approach To Formality Equivalence Checking

By Avinash Palepu - 29 Oct, 2020 - Comments: 0

By Avinash Palepu, Namrata Shekhar and Paula Neeley After a long and hard week, it is Friday night and you are ready to relax and unwind with a glass of wine, a sumptuous dinner and a great movie. You turn on Netflix and you expect that it will not only have plenty of pertinent suggestions for you, but also the most appropriate one based on all the previous movies and shows that you have wat... » read more

Chips Listening To Gibberish

By Jörg Bormann - 08 Oct, 2020 - Comments: 0

We all talk gibberish once in a while. At least, I do. I might be in a silly mood, thinking aloud, listening to music or talking over the phone using my headphones (they are quite small, and if you don’t notice them, you could think I am crazy). Regardless of the circumstances, I mean no harm, I promise. However, it’s still possible that a passer-by could get distracted trying to figure out... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?