Week In Review: Manufacturing, Test

By Mark LaPedus - 30 Nov, 2018 - Comments: 0

Chipmakers GlobalFoundries has announced that its advanced silicon-germanium (SiGe) offering is available for prototyping on 300mm wafers. GF’s SiGe technology has been shipping on its 200mm production line in Burlington, Vt. The technology, a 90nm SiGe process, is moving to 300mm wafers at GF’s Fab 10 facility in East Fishkill, N.Y. The SiGe technology is called 9HP. “The increasing ... » read more

The Process Design Kit: Protecting Design Know-How

By John Ferguson - 08 Nov, 2018 - Comments: 2

Once upon a time, integrated circuits (ICs) were built by the same companies that designed them. The design of an IC was tightly integrated with the manufacturing processes available within each company. In these days, when designs contained hundreds of transistors, companies modeled each feature in an IC at a first principles level, meaning each transistor or fundamental device was analyzed an... » read more

Process Variation Not A Solved Issue

By Ann Mutschler - 09 Aug, 2018 - Comments: 4

Semiconductor Engineering sat down to talk about process variation in advanced nodes, and how design teams are coping, with Christoph Sohrmann, a member of the Advanced Physical Verification group in Fraunhofer’s Division of Engineering of Adaptive Systems (EAS); Juan Rey, vice president of engineering at Mentor, A Siemens Business; and Stephen Crosher, CEO of Moortec Semiconductor. What foll... » read more

Defect Reduction At 7/5nm

By Ed Sperling - 12 Jul, 2018 - Comments: 0

Darin Collins, director of metrology at Brewer Science, talks about the cause of defects at advanced nodes and how material purity increasingly plays a role in overall quality and yield. » read more

What’s Next In R&D?

By Mark LaPedus - 21 Jun, 2018 - Comments: 1

Luc Van den hove, president and chief executive of Imec, sat down with Semiconductor Engineering to discuss R&D challenges and what’s next in the arena. The Belgium R&D organization is working on AI, DNA storage, EUV, semiconductors and other technologies. What follows are excerpts of that conversation. SE: Moore’s Law is slowing down. And it is becoming more expensive to move fr... » read more

The Week in Review: IoT

By Jeff Dorsch - 06 Apr, 2018 - Comments: 0

Investment Microsoft this week said it will spend $5 billion over four years on Internet of Things programs in research, development, and partner enablement. The company previously spent $1.5 billion on developing IoT technology. The move could pay dividends for the Microsoft Azure cloud platform and lead to wider use of Azure Stack, which pairs Microsoft software with hardware from approved p... » read more

Why All Nodes Won’t Work

By Ed Sperling - 08 Mar, 2018 - Comments: 4

A flood of new nodes, half-nodes and every number in between is creating confusion among chipmakers. While most say it's good to have choices, it's not clear which or how many of those choices are actually good. At issue is which [getkc id="43" kc_name="IP"] will be available for those nodes, how that IP will differ from other nodes in terms of power, performance, area and sensitivity to a v... » read more

What’s Missing In Packaging

By Ed Sperling - 06 Nov, 2017 - Comments: 0

The growth of advanced packaging on the leading edge of design is inching backwards into older nodes. With most technology—tools, methodologies, materials and processes—this is business as usual. But in packaging, it's both counterintuitive and potentially problematic. The main reason that companies began investing in advanced packaging—OSATs, foundries, chipmakers such as Intel and Qu... » read more

Tech Talk: Smart Manufacturing

By Ed Sperling - 17 Aug, 2017 - Comments: 0

Tom Salmon, vice president of collaborative technology platforms at SEMI, examines the electronics supply chain and what the industry organization is doing to pull all of the pieces together. https://youtu.be/jWX9mayMaZo Related Stories Smart Manufacturing Gains Momentum Problems remain for legacy infrastructure, but adoption will continue to grow as gaps are identified and plugged. ... » read more

Dealing With System-Level Power

By Ann Mutschler - 17 Jul, 2017 - Comments: 1

Analyzing and managing power at the system level is becoming more difficult and more important—and slow to catch on. There are several reasons for this. First, design automation tools have lagged behind an understanding of what needs to be done. Second, modeling languages and standards are still in flux, and what exists today is considered inadequate. And third, while system-level power ha... » read more

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Knowledge Centers
Entities, people and technologies explored

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3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

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The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

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Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

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Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

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