tag: Fraunhofer IIS EAS

Temperature Reduction on a High-Power Thermal Demonstrator
By Fraunhofer IIS/EAS - 10 Oct, 2018 - Comments: 0

High-power applications in microelectronic devices and systems is a crucial and severe issue that may cause elevated thermal and thermomechanical phenomena and finally lead the fabricated system to degradation, limitation of its performance, or even failure and destruction of its features. In specific applications, such as those found in the industry and the automotive sector, the power pro... » read more

Aging In Advanced Nodes
By Ann Mutschler - 17 Sep, 2018 - Comments: 0

Semiconductor Engineering sat down to discuss design reliability and circuit aging with João Geada, chief technologist for the semiconductor business unit at ANSYS; Hany Elhak, product management director, simulation and characterization in the custom IC and PCB group at Cadence; Christoph Sohrmann, advanced physical verification at Fraunhofer EAS; Magdy Abadir, vice president of marketing at ... » read more

Mission Profiles
By Jens Michael Warmuth - 13 Sep, 2018 - Comments: 1

In the field of electronic systems, the mission profile has been one of the key concepts since the start of the scientific examination of the subject of reliability. Its exact meaning varies with time and the industry using it. In particular, over the course of increasing digitalization and networking in the context of IoT and the opportunities resulting from this, the subject of mission profil... » read more

Process Corner Explosion
By Ann Mutschler - 13 Sep, 2018 - Comments: 1

The number of corners that need to be checked is exploding at 7nm and below, fueled by everything from temperature and voltage to changes in metal. Lowering risk and increasing predictability of an SoC at those nodes starts with understanding what will happen when a design is manufactured on a particular foundry process, captured in process corners. This is basically a way of modeling what i... » read more

Minimizing Chip Aging Effects
By Brian Bailey - 13 Sep, 2018 - Comments: 2

Aging kills semiconductors, and it is a growing problem for an increasing number of semiconductor applications—especially as they migrate to more advanced nodes. Additional analysis and prevention methods are becoming necessary for safety critical applications. While some aspects of aging can be mitigated up front, others are tied to the operation of the device. What can an engineering tea... » read more

Variation In Low-Power FinFET Designs
By Ann Mutschler - 30 Aug, 2018 - Comments: 1

One of the biggest advantages of moving to the a leading edge process node is ultra-low voltage operation, where devices can achieve better performance using less power. But the latest generation process nodes also introduce a number of new challenges due to increased variation that can affect everything from signal integrity to manufacturing yield. While variation is generally well understo... » read more

Is Software Necessary?
By Brian Bailey - 27 Aug, 2018 - Comments: 0

Hardware must be capable of running any software. While that might have been a good mantra when chips were relatively simple, it becomes an impossible verification task when dealing with SoCs that contain dozens of deeply embedded processors. When does it become necessary to use production software and what problems can that get you into? When verification targets such as power are added, it... » read more

Chip Aging Becomes Design Problem
By Brian Bailey - 09 Aug, 2018 - Comments: 9

Chip aging is a growing problem at advanced nodes, but so far most design teams have not had to deal with it. That will change significantly as new reliability requirements roll out across markets such as automotive, which require a complete analysis of factors that affect aging. Understanding the underlying physics is critical, because it can lead to unexpected results and vulnerabilities. ... » read more

Predictive Maintenance In Tomorrow’s Industries
By Olaf Enge-Rosenblatt - 09 Aug, 2018 - Comments: 0

By Olaf Enge-Rosenblatt and Steven Brandt Tomorrow’s production plants must be efficient and adaptive, which is the key to survival in modern, highly competitive markets brought about by digitalization and automation. Future-oriented companies are increasingly focusing on a tight combination of automation and computer technology as promised by the Industry 4.0 paradigm. More and more globa... » read more

Process Variation Not A Solved Issue
By Ann Mutschler - 09 Aug, 2018 - Comments: 4

Semiconductor Engineering sat down to talk about process variation in advanced nodes, and how design teams are coping, with Christoph Sohrmann, a member of the Advanced Physical Verification group in Fraunhofer’s Division of Engineering of Adaptive Systems (EAS); Juan Rey, vice president of engineering at Mentor, A Siemens Business; and Stephen Crosher, CEO of Moortec Semiconductor. What foll... » read more

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