tag: Fraunhofer IIS EAS

Tech Talk: Shrink Vs. Package
By Ed Sperling - 10 May, 2018 - Comments: 0

Andy Heinig, group manager for system integration at Fraunhofer EAS, talks about the tradeoffs between planar design and advanced packaging, including different types of interposers, chiplets and thermal issues. https://youtu.be/1BDqgCujJno » read more

Implementation Of An Asynchronous Bundled-Data Router For A GALS NoC In The Context Of A VSoC
By Fraunhofer IIS/EAS - 09 May, 2018 - Comments: 0

Designs of asynchronous networks-on-chip are of growing interest because a complete asynchronous implemen- tation can solve the synchronization problems of large networks. However, asynchronous circuits suffer from the lack of proper design flows because their functionality often relies on timing constraints, which are not extensively supported by common CAD synthesis tools. This paper proposes... » read more

Designing Hardware For Security
By Ed Sperling - 09 May, 2018 - Comments: 1

By Ed Sperling and Kevin Fogarty Cyber criminals are beginning to target weaknesses in hardware to take control of devices, rather than using the hardware as a stepping stone to access to the software. This shift underscores a significant increase in the sophistication of the attackers, as evidenced by the discovery of Spectre and Meltdown by Google Project Zero in 2017 (made public in Ja... » read more

Tech Talk: Analog Simplified
By Ed Sperling - 16 Apr, 2018 - Comments: 0

Benjamin Prautsch, Fraunhofer EAS' group manager for advanced mixed-signal automation, talks about how to simplify and speed up analog IP development, its role in IoT and IIoT/Industry 4.0, and why this is becoming so important for advanced packaging and advanced process nodes. https://youtu.be/6ISL1A7Wy_I » read more

Aging Models: The Basis For Predicting Circuit Reliability
By Andre Lange - 12 Apr, 2018 - Comments: 0

Today, many products are based on high-performance electronic systems and integrated circuits (ICs), and the importance of these elements is ever-increasing. A certain tension arises here as these applications often call for a large amount of processing power and reliability. The processing power can best be supplied with highly scaled semiconductor technologies. However, these manufacturing te... » read more

Enhancing The Energy-Efficient Production of Tempered Glass By Using Simulation-Based Optimization
By Fraunhofer IIS/EAS - 11 Apr, 2018 - Comments: 0

In many industrial manufacturing processes energy use is one of the most important cost factors. Especially in energy-intensive industries like steel production or glass processing minimizing energy use is a key measure to save resources and reduce manufacturing costs. The research project OptPlanEnergie concentrates on the production of tempered glass. In this project we apply simulation and o... » read more

Choosing The Right Interconnect
By Ed Sperling - 09 Apr, 2018 - Comments: 3

Efforts to zero in on cheaper advanced packaging approaches that can speed time to market are being sidetracked by a dizzying number of choices. At the center of this frenzy of activity is the [getkc id="36" kc_name="interconnect"]. Current options range from organic, silicon and glass interposers, to bridges that span different die at multiple levels. There also are various fan-out approach... » read more

The Analog Design Gap
By Benjamin Prautsch - 08 Mar, 2018 - Comments: 0

By Benjamin Prautsch and Torsten Reich Sensors are everywhere. In the context of Industry 4.0 and IoT, we face an ever-increasing demand for high-quality sensing. Data acquisition is fundamental to adaptive production chains. So aggregating data isn't just some nice-to-have feature. It is the basis of modern production systems. But don’t we have sensors already? Isn’t everything fine?... » read more

Why All Nodes Won’t Work
By Ed Sperling - 08 Mar, 2018 - Comments: 4

A flood of new nodes, half-nodes and every number in between is creating confusion among chipmakers. While most say it's good to have choices, it's not clear which or how many of those choices are actually good. At issue is which [getkc id="43" kc_name="IP"] will be available for those nodes, how that IP will differ from other nodes in terms of power, performance, area and sensitivity to a v... » read more

Application Of Richardson Extrapolation To The Co-Simulation Of FMUs From Building Simulation
By Fraunhofer IIS/EAS - 07 Mar, 2018 - Comments: 0

The application of the FMI technology gains ground in building simulation. As far as specialized tools support the FMI simulator coupling becomes an important option to simulate complex building models. Co-simulation needs a master algorithm which controls the communication time steps as well as the signal exchange between FMUs. Often a constant communication step size is applied chosen by the ... » read more

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