Chip Industry Week In Review


Samsung and Synopsys collaborated on the first production tapeout of a high-performance mobile SoC design, including CPUs and GPUs, using the Synopsys.ai EDA suite on Samsung Foundry's gate-all-around (GAA) process. Samsung plans to begin mass production of 2nm process GAA chips in 2025, reports BusinessKorea. UMC developed the first radio frequency silicon on insulator (RF-SOI)-based 3D IC ... » read more

3D NAND: Scenarios For Scaling & Stacking


A new research paper titled "Impact of Stacking-Up and Scaling-Down Bit Cells in 3D NAND on Their Threshold Voltages" was published by researchers at Sungkyunkwan University and Korea University. Abstract "Over the past few decades, NAND flash memory has advanced with exponentially-increasing bit growth. As bit cells in 3D NAND flash memory are stacked up and scaled down together, some pote... » read more

FEOL Nanosheet Process Flow & Challenges Requiring Metrology Solutions (IBM Watson)


New technical paper titled "Review of nanosheet metrology opportunities for technology readiness," from researchers at IBM Thomas J. Watson Research Ctr. (United States). Abstract (partial): "More than previous technologies, then, nanosheet technology may be when some offline techniques transition from the lab to the fab, as certain critical measurements need to be monitored in real time. T... » read more

Synchrotron S-ray Diffraction-based Non-destructive Nanoscale Mapping of Si/SiGe Nanosheets for GAA structures


New research paper titled "Mapping of the mechanical response in Si/SiGe nanosheet device geometries" from researchers at IBM T.J. Watson Research Center and Brookhaven National Laboratory. Sponsored by U.S. DOE. Abstract "The performance of next-generation, nanoelectronic devices relies on a precise understanding of strain within the constituent materials. However, the increased flexibilit... » read more

Week In Review: Manufacturing, Test


Government policy Hoping to resolve the ongoing worldwide chip shortage situation, the U.S. Department of Commerce late last month launched a “request for information (RFI)” initiative, which involved sending questionnaires to various semiconductor companies. The U.S. government is asking all parts of the supply chain – producers, consumers, and intermediaries – to voluntarily share in... » read more

Dynamic Flash Memory with Dual Gate Surrounding Gate Transistor (SGT)


Abstract: "This paper proposes an ultra-scaled memory device, called `Dynamic Flash Memory (DFM)'. With a dual-gate Surrounding Gate Transistor (SGT), a capacitorless 4F2 cell can be achieved. Similar to DRAM [1], refresh is needed, but high speed block refresh can improve the duty ratio. Analogous to Flash [2], three fundamental operations of “0” Erase, “1” Program, and Read are nee... » read more

Inner Spacer Engineering to Improve Mechanical Stability in Channel-Release Process of Nanosheet FETs


  Abstract "Mechanical stress is demonstrated in the fabrication process of nanosheet FETs. In particular, unwanted mechanical instability stemming from gravity during channel-release is covered in detail by aid of 3-D simulations. The simulation results show the physical weakness of suspended nanosheets and the impact of nanosheet thickness. Inner spacer engineering based on geometr... » read more

From FinFETs To Gate-All-Around


When they were first commercialized at the 22 nm node, finFETs represented a revolutionary change to the way we build transistors, the tiny switches in the “brains” of a chip. As compared to prior planar transistors, the fin, contacted on three sides by the gate, provides much better control of the channel formed within the fin. But, finFETs are already reaching the end of their utility as... » read more

Extreme Quality Semiconductor Manufacturing


By Ben Tsai and Cathy Perry Sullivan Across the full range of semiconductor device types and design nodes, there is a drive to produce chips with significantly higher quality. Automotive, IoT and other industrial applications require chips that achieve very high reliability over a long period of time, and some of these chips must maintain reliable performance while operating in an environmen... » read more

What’s Next For Atomic Layer Etch?


After years in R&D, several fab tool vendors last year finally began to ship systems based a next-generation technology called atomic layer etch (ALE). [getkc id="284" kc_name="ALE"] is is moving into 16/14nm, but it will play a big role at 10/7nm and beyond. The industry also is working on the next wave of ALE technology for advanced logic and memory production. Used by chipmakers fo... » read more

← Older posts