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Challenges In Developing A New Inferencing Chip


Cheng Wang, co-founder and senior vice president of software and engineering at Flex Logix, sat down with Semiconductor Engineering to explain the process of bringing an inferencing accelerator chip to market, from bring-up, programming and partitioning to tradeoffs involving speed and customization.   SE: Edge inferencing chips are just starting to come to market. What challenges di... » read more

Week In Review: Design, Low Power


IP, FPGA, Tools Arm released new details on its new Neoverse N2 and Neoverse V1 platforms. A range of companies announced they will be using the platforms, including Marvell and SiPearl. Aimed at server and HPC workloads, Neoverse V1 uses wider and deeper pipelines compared to the N1 and supports a 2x256bit wide vector unit executing the Scalable Vector Extension (SVE) instructions with sup... » read more

Week In Review: Design, Low Power


Companies Pearl Semiconductor launched to provide low and ultra-low noise timing products. “Pearl is a timing company developing resonator-agnostic solutions. We work with quartz crystals, MEMS resonators or whatever achieves superior performance,” said Ayman Ahmed, CEO of Pearl Semiconductor. “Current and future automotive applications demand low noise and a wide operating temperatur... » read more

Week In Review: Design, Low Power


Renesas Electronics Corporation will acquire Dialog Semiconductor in an all-cash deal worth about US $5.9 billion. Dialog is a supplier of mixed-signal ICs targeting IoT, consumer, automotive, and industrial. The company's primary areas of focus were communications and power control. These products are complementary to existing Renesas embedded compute products. Dialog CEO Dr. Jalal Bagherli... » read more

Advanced Packaging Makes Testing More Complex


The limits of monolithic integration, together with advances in chip interconnect and packaging technologies, have spurred the growth of heterogeneous advanced packaging where multiple dies are co-packaged using 2.5D and 3D approaches. But this also raises complex test challenges, which are driving new standards and approaches to advanced-package testing. While many of the showstopper issues... » read more

Week in Review: IoT, Security and Automotive


Internet of Things Western Digital Corp. and Codasip are working together on Western Digital’s SweRV Core EH1, which is a RISC-V core with a 32-bit, dual superscalar, 9-stage pipeline architecture. The core, launched earlier this is aimed at embedded devices supporting data-intensive edge applications, such as storage controllers, industrial IoT, real-time analytics in surveillance systems, ... » read more

Week In Review: Design, Low Power


Intel disclosed a speculative execution side-channel attack method called L1 Terminal Fault (L1TF). Leslie Culbertson, Intel's executive vice president and general manager of Product Assurance and Security, writes: "This method affects select microprocessor products supporting Intel Software Guard Extensions (Intel SGX) and was first reported to us by researchers at KU Leuven University, Techni... » read more

The Week In Review: Design/IoT


Mergers & Acqusitions Mentor Graphics acquired Tanner EDA, bolstering their position in tools for analog, mixed-signal and MEMs. Terms of the deal were not disclosed. NXP joins forces with Freescale. The merger carries a $16.7 billion price tag and potentially creates a new leader in the automotive and MCU markets. Standards Accellera sent UVM 1.2 off to the IEEE P1800.2 working... » read more