tag: GlobalFoundries

The Challenges Of 28nm HKMG
By Various Writers - 26 Jun, 2012 - Comments: 0

28nm Super Low Power (28nm-SLP) is the low power CMOS offering delivered on a bulk silicon substrate for mobile consumer and digital consumer applications. This technology has four Vt's (high, regular, low and super low) for design flexibility with multi-channel length capability and offers the ultimate in small die size and low cost. Multiple SRAM bit cells for high density and high-performanc... » read more

GloFo to Fab 28/20nm FD-SOI for ST; ST Tech Open to GF Customers
By Various Writers - 15 Jun, 2012 - Comments: 0

Two big pieces of news have recently been announced by STMicroelectronics: to supplement in-house production at Crolles, the company has tapped GlobalFoundries for high-volume production of 28nm then 20nm FD-SOI mobile devices; ST will open access to its FD-SOI technology to GlobalFoundries’ other customers. The high-volume manufacturing will kick off with ST-Ericsson’s ARM-based 2... » read more

Roundtable: DAC Retrospective
By Ed Sperling - 13 Jun, 2012 - Comments: 0

Is DAC really a design automation conference, or has it shifted to a design enablement conference due to rising complexity breaking down traditional barriers and silos? Low Power High Performance Engineering talks with Atrenta CTO Bernard Murphy about the changes. [youtube vid=Z_xBaRsC_Hs] » read more

Experts At The Table: IP Subsystems
By Ed Sperling - 29 May, 2012 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss the transition to IP subsystems with Kevin Meyer, vice president of design enablement strategy and alliances at GlobalFoundries; Steve Roddy, vice president of marketing at Tensilica; Mike Gianfagna, vice president of marketing at Atrenta; and Adam Kablanian, CEO of Memoir Systems. What follows are excerpts of that co... » read more

Getting Ready For 20nm
By Ed Sperling - 29 May, 2012 - Comments: 0

By Ed Sperling and Mark Lapedus Despite hurdles in getting 28nm rolling and predictions that process technology will stick around for years to come, there appears to be rapidly growing interest in 20nm—at least from the design side. This is significant for a couple reasons. First, for most companies 20nm will be the first encounter with double patterning because EUV still is not viable—... » read more

Options And Hurdles Come Into Focus For 3D Stacking
By Ed Sperling - 29 May, 2012 - Comments: 0

By Mark LaPedus The initial round of stacked 2.5D and 3D chips based on through-silicon vias (TSVs) has emerged in the market. There are other 2.5D/3D chips in the pipeline, but it’s taking longer than expected to bring these devices into production. There are a range of design, manufacturing, supply chain and cost challenges associated with 2.5D/3D designs. The enormous risk to bring ... » read more

The Hidden Costs Of Directed Self-Assembly
By Ed Sperling - 29 May, 2012 - Comments: 2

By Mark LaPedus Directed self-assembly (DSA) has been billed by some as a potential paradigm shift in semiconductor manufacturing, but it may not turn out to be quite the panacea its proponents suggest—or at least not yet. There are many questions surrounding DSA, an alternative lithography technology that makes use of block copolymers to enable fine pitches. Key among those questions ar... » read more

The 28nm Foundry Crunch
By Ed Sperling - 29 May, 2012 - Comments: 0

By Mark LaPedus Faced with huge and unforeseen demand at the 28nm node, leading-edge foundries are scrambling to play catch-up and are boosting their fab capacities at a staggering pace. But analysts warn that 28nm foundry capacity will be tight throughout 2012, and perhaps into 2013, putting some chipmakers in a pinch. Many blame the 28nm foundry capacity shortfall on a combination of t... » read more

28nm Super Low Power CMOS
By Various Writers - 29 May, 2012 - Comments: 0

28nm Super Low Power (28nm-SLP) is the low-power CMOS offering delivered on bulk silicon substrate for mobile consumer and digital consumer applications. GlobalFoundries' 28nm-SLP process technology is designed for the next generation of smart mobile devices, enabling designs with faster GHz processing speeds, higher circuit density, lower standby power and longer battery life. The 28nm process... » read more

New Power Standards Ahead
By Ed Sperling - 10 May, 2012 - Comments: 0

By Ed Sperling Standards groups are beginning to look at power and other physical effects much more seriously in the wake of the dueling power formats—UPF and CPF—that have caused angst across the design industry. To put it in perspective, when CPF and UPF were first introduced power was something of an afterthought in design. At 65nm it ceased to be something that could be dealt with l... » read more

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