tag: GlobalFoundries

More Than Trees Growing in Luther Forest
By Joanne Itow - 07 Jun, 2011 - Comments: 0

By Joanne Itow Last week Semico visited the GLOBALFOUNDRIES’ Fab 8 construction site and was impressed for several reasons. Not only is the infrastructure significant but the people and surrounding community have welcomed GLOBALFOUDNRIES, embraced the project as well as the invasion of businesses and people that go along with the project. This made our visit extremely pleasant and trouble... » read more

IC Yield Issues
By Ed Sperling - 27 May, 2011 - Comments: 0

What makes one semiconductor design yield better than another. And what issues are we likely to face going forward. Semiconductor Manufacturing & Design questions Amiad Conley from Applied Materials; Cyrus Tabery from GlobalFoundries; Brady Benware from Mentor Graphics, and Ankush Oberai from Magma. [youtube vid=1YjY436YmNQ] » read more

Who’s In Control?
By Ed Sperling - 26 May, 2011 - Comments: 0

By Ed Sperling A power shift is under way across the SoC world that ultimately determine who wins the business, who gets the biggest share and what technologies are ultimately used to get there. Complexity has reached a point where being able to pull the necessary pieces from a disaggregated supply chain is becoming much more difficult. That helps explain why all three of the major EDA comp... » read more

Waiting for Porous Low-k
By Katherine Derbyshire - 12 May, 2011 - Comments: 0

I'm working on a longer article on low-k dielectric integration, but in the meantime I wanted to pass along an observation from Joubert Olivier of LTM-CNRS, in his presentation at the Materials Research Society Spring Meeting. Asked about the prospects for low-k integration, he reminded the audience that even if an integration scheme is able to achieve good selectivity between the hard mask ... » read more

Experts At The Table: Yield Issues
By Ed Sperling - 22 Apr, 2011 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss yield with Amiad Conley, technology marketing manager for yield and process control at Applied Materials; Cyrus Tabery, senior member of the GlobalFoundries technical staff for lithography development and DFM; Brady Benware, engineering manager for diagnosis and yield at Mentor Graphics, and Ankush Oberai, general man... » read more

High Performance And Low Power
By Ed Sperling - 14 Apr, 2011 - Comments: 0

By Pallab Chatterjee As mobile platforms become a larger part of the component spectrum, their need for optimization beyond low power has moved to the forefront. Traditionally, standard "line-cord" based products in both the consumer and commercial sectors have used the "G" label processes from semiconductor foundries. These processes had the highest-yielding combination of design rules, d... » read more

Experts At The Table: Yield Issues
By Ed Sperling - 10 Apr, 2011 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss yield with Amiad Conley, technology marketing manager for yield and process control at Applied Materials; Cyrus Tabery, senior member of the GlobalFoundries technical staff for lithography development and DFM; Brady Benware, engineering manager for diagnosis and yield at Mentor Graphics, and Ankush Oberai, general man... » read more

Experts At The Table: Yield Issues
By Ed Sperling - 27 Mar, 2011 - Comments: 0

By Ed Sperling Semiconductor Manufacturing & Design sat down to discuss yield with Amiad Conley, technology marketing manager for yield and process control at Applied Materials; Cyrus Tabery, senior member of the GlobalFoundries technical staff for lithography development and DFM; Brady Benware, engineering manager for diagnosis and yield at Mentor Graphics, and Ankush Oberai, general man... » read more

Qualcomm Shies Away From High-k At 28nm
By Ed Sperling - 16 Dec, 2010 - Comments: 0

By David Lammers Qualcomm CDMA Technologies said it will not use a high-k/metal gate (HKMG) process for most of the chips it makes at the 28 nm node, sticking with a poly/SiON gate stack. The company described the rationale behind the strategy, which because of Qualcomm’s size will have a major impact on the foundry business, at the 2010 International Electron Devices Meeting (IEDM) held in ... » read more

Power Optimization Below 28nm
By Ed Sperling - 02 Dec, 2010 - Comments: 0

By Pallab Chatterjee Process scaling has normally been performed on a lithographic basis, but as processes dip below 32nm there are optimization options beyond the lithographic and area reduction. The Common Platform Group and GlobalFoundries have added the tradeoffs of power and performance optimization in addition to area in their 28nm flows. TSMC uses a five-way optimization that also h... » read more

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