tag: GPU

HBM3: Big Impact On Chip Design
By Ann Mutschler - 14 Oct, 2021 - Comments: 0

An insatiable demand for bandwidth in everything from high-performance computing to AI training, gaming, and automotive applications is fueling the development of the next generation of high-bandwidth memory. HBM3 will bring a 2X bump in bandwidth and capacity per stack, as well as some other benefits. What was once considered a "slow and wide" memory technology to reduce signal traffic dela... » read more

Leaky Buddies: Cross-Component Covert Channels on Integrated CPU-GPU Systems
By Technical Paper Link - 11 Aug, 2021 - Comments: 0

Find Technical Paper link here. Abstract: "Graphics Processing Units (GPUs) are ubiquitous components used across the range of today’s computing platforms, from phones and tablets, through personal computers, to high-end server class platforms. With the increasing importance of graphics and video workloads, recent processors are shipped with GPU devices that are integrated on the same chi... » read more

Efficient Multi-GPU Shared Memory via Automatic Optimization of Fine-Grained Transfers
By Technical Paper Link - 02 Jul, 2021 - Comments: 0

Harini Muthukrishnan (U of Michigan); David Nellans, Daniel Lustig (NVIDIA); Jeffrey A. Fessler, Thomas Wenisch (U of Michigan). Abstract—"Despite continuing research into inter-GPU communication mechanisms, extracting performance from multiGPU systems remains a significant challenge. Inter-GPU communication via bulk DMA-based transfers exposes data transfer latency on the GPU’s critical... » read more

Architectural Considerations For AI
By Brian Bailey - 24 Jun, 2021 - Comments: 2

Custom chips, labeled as artificial intelligence (AI) or machine learning (ML), are appearing on a weekly basis, each claiming to be 10X faster than existing devices or consume 1/10 the power. Whether that is enough to dethrone existing architectures, such as GPUs and FPGAs, or whether they will survive alongside those architectures isn't clear yet. The problem, or the opportunity, is that t... » read more

CEO Outlook: More Data, More Integration, Same Deadlines
By Ed Sperling - 24 Jun, 2021 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss the future of chip design and EDA tools with Lip-Bu Tan, CEO of Cadence; Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of Siemens IC EDA; John Kibarian, CEO of PDF Solutions; Prakash Narain, president and CEO of Real Intent; Dean Drako, president and CEO of IC Manage; and Babak Taheri, CEO of Silvaco. What ... » read more

Tradeoffs To Improve Performance, Lower Power
By Ann Mutschler - 11 Mar, 2021 - Comments: 0

Generic chips are no longer acceptable in competitive markets, and the trend is growing as designs become increasingly heterogeneous and targeted to specific workloads and applications. From the edge to the cloud, including everything from vehicles, smartphones, to commercial and industrial machinery, the trend increasingly is on maximizing performance using the least amount of energy. This ... » read more

DRAM’s Persistent Threat To Chip Security
By Bryon Moyer - 10 Feb, 2021 - Comments: 0

A well-known DRAM vulnerability called "rowhammer," which allows an assailant to disrupt or take control of a system, continues to haunt the chip industry. Solutions have been tried, and new ones are being proposed, but the potential for a major attack persists. First discovered some five years ago, most of the efforts to eliminate the "rowhammer" threat have done little more than mitigate t... » read more

Von Neumann Is Struggling
By Brian Bailey - 18 Jan, 2021 - Comments: 5

In an era dominated by machine learning, the von Neumann architecture is struggling to stay relevant. The world has changed from being control-centric to one that is data-centric, pushing processor architectures to evolve. Venture money is flooding into domain-specific architectures (DSA), but traditional processors also are evolving. For many markets, they continue to provide an effective s... » read more

Powering The Edge: Driving Optimal Performance With Ethos-N77 Processor
By Arm - 09 Dec, 2020 - Comments: 0

Repurposing a CPU, GPU, or DSP is an easy way to add ML capabilities to an edge device. However, where responsiveness or power efficiency is critical, a dedicated Neural Processing Unit (NPU) may be the best solution. In this paper, we describe how the Arm Ethos-N77 NPU delivers optimal performance. Click here to immediately download the paper. » read more

What’s Next In AI, Chips And Masks
By Mark LaPedus - 19 Nov, 2020 - Comments: 0

Aki Fujimura, chief executive of D2S, sat down with Semiconductor Engineering to talk about AI and Moore’s Law, lithography, and photomask technologies. What follows are excerpts of that conversation. SE: In the eBeam Initiative’s recent Luminary Survey, the participants had some interesting observations about the outlook for the photomask market. What were those observations? Fujimur... » read more

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