Novel Analog Key Generation Approach As An Alternative to Conventional Binary Keys (pHGen)


New research paper titled "pHGen: A pH-Based Key Generation Mechanism Using ISFETs" from RWTH Aachen University. Abstract "Digital keys are a fundamental component of many hardware- and software-based security mechanisms. However, digital keys are limited to binary values and easily exploitable when stored in standard memories. In this paper, based on emerging technologies, we introduce... » read more

Building A Robust Hardware Security Program


Even mature chip development teams and processes aren’t immune to security errors. While many semiconductor and hardware manufacturing organizations have mature development processes, existing security testing practices, and formal signoff requirements, the complexity and duration of the chip lifecycle creates many opportunities for security issues to be overlooked. Semiconductors now play... » read more

FICS Research Institute: Detailed Assessment of the PQC Candidates To Power Side Channel Attacks


New research paper by a team of researchers from FICS Research Institute titled "PQC-SEP: Power Side-Channel Evaluation Platform for Post-Quantum Cryptography Algorithms." Abstract "Research in post-quantum cryptography (PQC) aims to develop cryptographic algorithms that can withstand classical and quantum attacks. The recent advance in the PQC field has gradually switched from the theory t... » read more

Spatial Analysis Tools & Side Channel Attacks


Abstract "Practical side-channel attacks on recent devices may be challenging due to the poor quality of acquired signals. It can originate from different factors, such as the growing architecture complexity, especially in System-on-Chips, creating unpredictable and concurrent operation of multiple signal sources in the device. This work makes use of mixture distributions to formalize... » read more

Ensuring Security By Design Is Actually Secure


Today’s connected systems touch nearly every part of consumers’ lives, from smart thermostats in our homes to self-driving cars on our roads. The adoption of these new devices has led to an explosion of new semiconductors and use models. But these novel conveniences also come with new risks. With vulnerabilities on the rise and the potential for remote attacks growing, product companies mus... » read more

Hardware Encryption: Ultra-compact Active Interconnect Based on FeFET


New technical paper "Hardware functional obfuscation with ferroelectric active interconnects" from researchers at Penn State, Rochester Institute of Technology, GlobalFoundries Fab1, North Dakota State University. Abstract "Existing circuit camouflaging techniques to prevent reverse engineering increase circuit-complexity with significant area, energy, and delay penalty. In this paper, we... » read more

Hardware-Supported Patching of Security Bugs in Hardware IP Blocks


New research paper from Duke University, University of Calgary, NYU & Intel. Abstract: "To satisfy various design requirements and application needs, designers integrate multiple Intellectual Property blocks (IPs) to produce a system-on-chip (SoC). For improved survivability, designers should be able to patch the SoC to mitigate potential security issues arising from hardware IPs; for incre... » read more

Reusing Verification Assertions as Security Checkers for Hardware Trojan Detection


Abstract "Globalization in the semiconductor industry enables fabless design houses to reduce their costs, save time, and make use of newer technologies. However, the offshoring of Integrated Circuit (IC) fabrication has negative sides, including threats such as Hardware Trojans (HTs) - a type of malicious logic that is not trivial to detect. One aspect of IC design that is not affected by g... » read more

Hardware Countermeasures Benchmarking against Fault Attacks


Abstract "The development of differential fault analysis (DFA) techniques and mechanisms to inject faults into cryptographic circuits brings with it the need to use protection mechanisms that guarantee the expected level of security. The AES cipher, as a standard, has been the target of numerous DFA techniques, where its security has been compromised through different formulations and types of... » read more

Quantum Machine Learning: Security Threats & Lines Of Defense


New research paper from Pennsylvania State University explores quantum machine learning (QML) and its use in hardware security. Find the technical paper here. April 2022. Satwik Kundu and Swaroop Ghosh. 2022. Security Aspects of Quantum Machine Learning: Opportunities, Threats and Defenses (Invited). In Proceedings of the Great Lakes Symposium on VLSI 2022 (GLSVLSI ’22), June 6–8,... » read more

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