Nanoscale Reconfigurable Si Transistors (TU Wien, CNRS, UNC)


A new technical paper titled "Nanoscale Reconfigurable Si Transistors: From Wires to Sheets and Unto Multi-Wire Channels" was published by researchers at TU Wien, CNRS, and University of North Carolina at Chapel Hill. Abstract: "In this work, bottom-up Al–Si–Al nanowire (NW) heterostructures are presented, which act as a prototype vehicle toward top-down fabricated nanosheet (NS) and ... » read more

Hardware-Based Methodology To Protect AI Accelerators


A technical paper titled “A Unified Hardware-based Threat Detector for AI Accelerators” was published by researchers at Nanyang Technological University and Tsinghua University. Abstract: "The proliferation of AI technology gives rise to a variety of security threats, which significantly compromise the confidentiality and integrity of AI models and applications. Existing software-based so... » read more

More Efficient Side-Channel Analysis By Applying Two Deep Feature Loss Functions


A technical paper titled “Beyond the Last Layer: Deep Feature Loss Functions in Side-channel Analysis” was published by researchers at Nanyang Technological University, Radboud University, and Delft University of Technology. Abstract: "This paper provides a novel perspective on improving the efficiency of side-channel analysis by applying two deep feature loss functions: Soft Nearest Neig... » read more

Hardware Fuzzing With MAB Algorithms


A technical paper titled “MABFuzz: Multi-Armed Bandit Algorithms for Fuzzing Processors” was published by researchers at Texas A&M University and Technische Universitat Darmstadt. Abstract: "As the complexities of processors keep increasing, the task of effectively verifying their integrity and security becomes ever more daunting. The intricate web of instructions, microarchitectural ... » read more

Analyzing The U.S. Advanced Packaging Ecosystem With Countermeasures To Mitigate HW Security Issues


A technical paper titled “US Microelectronics Packaging Ecosystem: Challenges and Opportunities” was published by researchers at University of Florida, University of Miami, and Skywater Technology Foundry. Abstract: "The semiconductor industry is experiencing a significant shift from traditional methods of shrinking devices and reducing costs. Chip designers actively seek new technologica... » read more

GNN-Based Pre-Silicon Power Side-Channel Analysis Framework At RTL Level


A technical paper titled “SCAR: Power Side-Channel Analysis at RTL-Level” was published by researchers at University of Texas at Dallas, Technology Innovation Institute and University of Illinois Chicago. Abstract: "Power side-channel attacks exploit the dynamic power consumption of cryptographic operations to leak sensitive information of encryption hardware. Therefore, it is necessary t... » read more

A Framework To Detect Capacitance-Based Analog Hardware Trojans And Mitigate The Effects


A technical paper titled “DeMiST: Detection and Mitigation of Stealthy Analog Hardware Trojans” was published by researchers at Tennessee Tech University and Technische Universitat Wien. Abstract: "The global semiconductor supply chain involves design and fabrication at various locations, which leads to multiple security vulnerabilities, e.g., Hardware Trojan (HT) insertion. Although most... » read more

Using Deep Learning to Secure The CAN Bus From Advanced Intrusion Attacks


A technical paper titled “CANShield: Deep Learning-Based Intrusion Detection Framework for Controller Area Networks at the Signal-Level” was published by researchers at Virginia Tech and others. "As modern vehicles become more connected to external networks, the attack surface of the CAN bus system grows drastically. To secure the CAN bus from advanced intrusion attacks, we propose a sig... » read more

New Type Of Hardware Trojans Based On Logic Locking


A technical paper titled “Logic Locking based Trojans: A Friend Turns Foe” was published by researchers at University of Maryland and University of Florida. Abstract: "Logic locking and hardware Trojans are two fields in hardware security that have been mostly developed independently from each other. In this paper, we identify the relationship between these two fields. We find that a com... » read more

Detecting Hardware Trojans Using Analytical Modeling


A technical paper titled “Secure Run-Time Hardware Trojan Detection Using Lightweight Analytical Models” was published by researchers at National University of Singapore and Universitat Politecnica de Catalunya. Abstract: "Hardware Trojans, malicious components that attempt to prevent a chip from operating as expected, are carefully crafted to circumvent detection during the pre-deploymen... » read more

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