tag: HBM

A New Multi-Stimuli-Based Simulation Method for ESD Design Verification
By Technical Paper Link - 12 Nov, 2021 - Comments: 0

Abstract: "This paper analyzes TCAD ESD simulation for both HBM zapping using real-world HBM ESD waveforms as stimuli and TLP testing using square wave TLP pulse trains as stimuli. It concludes that TCAD ESD simulation using either HBM waveforms or TLP pulse trains, alone, is insufficient. We introduce a new mixed-mode simulation flow using combined HBM and TLP stimuli to achieve ESD design pr... » read more

HBM2E Raises The Bar For Memory Bandwidth
By Rambus - 10 Nov, 2021 - Comments: 0

AI/ML training capabilities are growing at a rate of 10X per year driving rapid improvements in every aspect of computing hardware and software. HBM2E memory is the ideal solution for the high bandwidth requirements of AI/ML training, but entails additional design considerations given its 2.5D architecture. Designers can realize the full benefits of HBM2E memory with the silicon-proven memory s... » read more

Architecting Interposers
By Brian Bailey - 14 Oct, 2021 - Comments: 0

An interposer performs a similar function as a printed circuit board (PCB), but when the interposer is moved inside a package the impact is significant. Neither legacy PCB nor IC design tools can fully perform the necessary design and analysis tasks. But perhaps even more important, adding an interposer to a design may require organizational changes. Today, leading-edge companies have shown ... » read more

HBM3 Memory: Break Through To Greater Bandwidth
By Rambus - 06 Oct, 2021 - Comments: 0

AI/ML’s demands for greater bandwidth are insatiable driving rapid improvements in every aspect of computing hardware and software. HBM memory is the ideal solution for the high bandwidth requirements of AI/ML training, but it entails additional design considerations given its 2.5D architecture. Now we’re on the verge of a new generation of HBM that will raise memory and capacity to new hei... » read more

Data Tsunami Pushes Boundaries Of IC Interconnects
By Ann Mutschler - 22 Sep, 2021 - Comments: 0

Rapid increases in machine-generated data are fueling demand for higher-performance multi-core computing, forcing design teams to rethink the movement of data on-chip, off-chip, and between chips in a package. In the past, this was largely handled by the on-chip interconnects, which often were a secondary consideration in the design. But with the rising volumes of data in markets ranging fro... » read more

On the Road To Higher Memory Bandwidth
By Frank Ferro - 09 Sep, 2021 - Comments: 0

In the decade since HBM was first announced, we’ve seen two-and-a-half generations of the standard come to market. HBM’s “wide and slow” architecture debuted first at a data rate of 1 gigabit per second (Gbps) running over a 1024-bit wide interface. The product of that data rate and that interface width provided a bandwidth of 128 gigabytes per second (GB/s). In 2016, HBM2 doubled the s... » read more

Will Monolithic 3D DRAM Happen?
By Bryon Moyer - 09 Sep, 2021 - Comments: 1

As DRAM scaling slows, the industry will need to look for other ways to keep pushing for more and cheaper bits of memory. The most common way of escaping the limits of planar scaling is to add the third dimension to the architecture. There are two ways to accomplish that. One is in a package, which is already happening. The second is to sale the die into the Z axis, which which has been a to... » read more

Sweeping Changes Ahead For Systems Design
By Ann Mutschler - 29 Jul, 2021 - Comments: 0

Data centers are undergoing a fundamental change, shifting from standard processing models to more data-centric approaches based upon customized hardware, less movement of data, and more pooling of resources. Driven by a flood of web searches, Bitcoin mining, video streaming, data centers are in a race to provide the most efficient and fastest processing possible. But because there are so ma... » read more

Bumps Vs. Hybrid Bonding For Advanced Packaging
By Mark LaPedus - 23 Jun, 2021 - Comments: 3

Advanced packaging continues to gain steam, but now customers must decide whether to design their next high-end packages using existing interconnect schemes or move to a next-generation, higher-density technology called copper hybrid bonding. The decision is far from simple, and in some cases both technologies may be used. Each technology adds new capabilities in next-generation advanced pac... » read more

Fan-Out Packaging Options Grow
By Mark LaPedus - 17 Jun, 2021 - Comments: 0

Chipmakers, OSATs and R&D organizations are developing the next wave of fan-out packages for a range of applications, but sorting out the new options and finding the right solution is proving to be a challenge. Fan-out is a way to assemble one or more dies in an advanced package, enabling chips with better performance and more I/Os for applications like computing, IoT, networking and sma... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy