Week In Review: Design, Low Power


Aldec expanded the rule-checking capabilities of its ALINT-PRO tool, adding twice as many FSM checks and new graphical representations to aid state exploration. Also included is enhanced setup automation for complex Xilinx Vivado and ISE projects that automatically organizes a workspace to deliver hierarchical and incremental DRC and CDC analysis. Xilinx acquired AI startup DeePhi Technology... » read more

5nm Design Progress


Activity surrounding the 5nm manufacturing process node is quickly ramping, creating a better picture of the myriad and increasingly complex design issues that must be overcome. Progress at each new node after 28nm has required an increasingly tight partnership between the foundries, which are developing new processes and rule decks, along with EDA and IP vendors, which are adding tools, met... » read more

Week In Review: Manufacturing, Test


Chipmakers GlobalFoundries said that the company’s 22nm FD-SOI technology has delivered more than $2 billion worth of client design win revenue. With more than 50 total client designs, the technology is designed for automotive, 5G connectivity and the Internet of Things (IoT). Helic has announced that its electromagnetic (EM) modeling engine has been certified for GlobalFoundries’ 22nm ... » read more

Week In Review: Design, Low Power


M&A Intel will acquire fabless company eASIC. Founded in 1999, eASIC sells structured ASIC platforms that act as a midpoint between FPGAs and standard cell ASICs by combining FPGA-like logic and design flows with single via routing. Eventually, Intel sees potential in using its Embedded Multi-Die Interconnect Bridge (EMIB) technology to combine Intel FPGAs with structured ASICs in a system... » read more

Preparing For A 5G World


Semiconductor Engineering sat down to talk about challenges and progress in 5G with Yorgos Koutsoyannopoulos, president and CEO of Helic; Mike Fitton, senior director of strategic planning and business development at Achronix; Sarah Yost, senior product marketing manager at National Instruments; and Arvind Vel, director of product management at ANSYS. What follows are excerpts of that conversat... » read more

Abstraction Aging


During the course of doing interviews for my article on system simulation and abstraction, I spoke to several people who, just like myself, had started their career pushing abstraction. At the time, we were all frustrated that the industry didn't move fast enough. The advantages of abstraction appeared to be so clear. Everyone developed slides showing that the cost to fix bugs increased the fur... » read more

Searching For A System Abstraction


Without abstraction, advances in semiconductor design would have stalled decades ago and circuits would remain about the same size as analog blocks. No new abstractions have emerged since the 1990s that have found widespread adoption. The slack was taken up by IP and reuse, but IP blocks are becoming larger and more complex. Verification by isolation is no longer a viable strategy at the system... » read more

Defining Edge Memory Requirements


Defining edge computing memory requirements is a growing problem for chipmakers vying for a piece of this market, because it varies by platform, by application, and even by use case. Edge computing plays a role in artificial intelligence, automotive, IoT, data centers, as well as wearables, and each has significantly different memory requirements. So it's important to have memory requirement... » read more

Is It Time To Take Inductance And Electromagnetic Effects On SoCs Seriously?


Electromagnetic (EM) crosstalk impact on SoC performance has been a topic of discussion for a number of years, but how seriously have designers put EM crosstalk detection and avoidance into their SoC design practice? With increasing demand for faster bandwidth, lower power and higher density electronic systems, isn’t it about time to take inductance and EM effects seriously? This topic will b... » read more

Near-Threshold Issues Deepen


Complex issues stemming from near-threshold computing, where the operating voltage and threshold voltage are very close together, are becoming more common at each new node. In fact, there are reports that the top five mobile chip companies, all with chips at 10/7nm, have had performance failures traced back to process variation and timing issues. Once a rather esoteric design technique, near... » read more

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