Reliability Performance Of S-Connect Module (Bridge Technology) For Heterogeneous Integration Packaging


Bridge technology is a promising heterogeneous integration (HI) solution for application-specific integrated circuits (ASICs) and high bandwidth memory (HBM). The bridge dies provide localized communications among the multiple system on chips (SoCs) in a single package. In Amkor's bridge technology, S-Connect provides die-to-die connections with fine pitch [1]. Prototype S-Connect technology wa... » read more

Why Chiplets Don’t Work For All Designs


Experts at the Table: Semiconductor Engineering sat down to discuss use cases and challenges for commercial chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts... » read more

The Glass Substrate Question: When Will It Replace Copper Clad Laminate?


"When will glass replace copper clad laminate on advanced IC substrates?" That’s a question many on the heterogeneous integration (HI) side of the semiconductor industry are asking. Unfortunately, the answer is not straightforward. But before we get to answering that, let’s take an advanced IC substrate (AICS) refresher. In other words, how did we get to the point where glass substrat... » read more

Who Will Regulate Data Exchanges In Chiplets?


Scaling is still important when it comes to logic and low power, but it's no longer the main avenue for improving performance. What used to be a single chip, comprised of various IP blocks and components on a single SoC, is giving way to a heterogeneous collection of chiplets — at least for the big chipmakers and system companies at the leading edge. Chiplets are currently the best solutio... » read more

The Road Ahead For SoCs In Self-Driving Vehicles


Automakers have relied on a human driver behind the wheel for more than a century. With Level 3 systems in place, the road ahead leads to full autonomy and Level 5 self-driving. However, it’s going to be a long climb. Much of the technology that got the industry to Level 3 will not scale in all the needed dimensions — performance, memory usage, interconnect, chip area, and power consumption... » read more

Smarter Systems Through Heterogeneous Integration: Highlights From 3D & Systems Summit


It has taken decades of research and development and strong commitment to various industry programs, but the stars are finally aligning for 3D semiconductor systems. No one could have left the 3D & Systems Summit 2023 – held in late June in Dresden – with any doubt that heterogeneous integration, enabled by increasingly mature 3D packaging technologies, is becoming a key driver of the s... » read more

Challenges Of Heterogeneous Integration


Heterogeneous integration opens the door to an almost unlimited number of features in a single package, but it also adds system-level challenges into a small space filled with a whole spectrum of possible interactions. Mike Kelly, vice president of chiplets/FCBGA integration at Amkor Technology, talks about a variety of issues ranging from uneven aging, warpage, and different mechanical stresse... » read more

Addressing Copper Clad Laminate Processing Distortion Using Overlay Corrections


All great voyages must come to an end. Such is the case with our series on the challenges facing the manufacturing of advanced IC substrates (AICS), the glue holding the heterogeneous integration ship together. In our first blog, we examined how cumulative overlay drift from individual redistribution layers could significantly increase overall trace length, resulting in higher interconnect res... » read more

Heterogeneous Integration As A Path Towards Sustainable Computing, Using Chiplets


A technical paper titled "Towards Sustainable Computing: Assessing the Carbon Footprint of Heterogeneous Systems" was published by researchers at Arizona State University and University of Minnesota. Abstract: "Decades of progress in energy-efficient and low-power design have successfully reduced the operational carbon footprint in the semiconductor industry. However, this has led to an incre... » read more

Impact of CMOS Image Sensors Fabrication Processes On The Quality Of Smartphone Pictures


A technical paper titled “A Review of the Recent Developments in the Fabrication Processes of CMOS Image Sensors for Smartphones” was published by researchers at Texas A&M University. Abstract: "CMOS Image Sensors are experiencing significant growth due to their capabilities to be integrated in smartphones with refined image quality. One of the major contributions to the growth of ima... » read more

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