How Multi-Die Systems Are Transforming Electronic Design


How can the electronics industry continue as Moore’s law slows, system complexity increases, and the number of transistors balloons to trillions? Multi-die systems have emerged as the solution to go beyond Moore’s law and address the challenges of systemic complexity, allowing for accelerated, cost-effective scaling of system functionality, reduced risk and time to market, lower system p... » read more

Issues In Calculating Glitch Power


The amount of power consumed by redundant non-functional toggles, or glitch power, can be as high as 35% of total power consumption in a design. What can be done about that? Godwin Maben, low-power architect and scientist at Synopsys, takes a deep dive into the causes of glitch, how it is affected by new process nodes and heterogeneous integration, and the impact of different workloads, higher ... » read more

Die-To-Die Security


Security concerns are growing as more chiplets or die are added into a package. There are more possible attack points, and data is becoming increasingly valuable, which makes a successful attack much more lucrative than in the past. Mike Borza, Synopsys scientist, talks about the impact of heterogeneous integration on security, what the risks are for multi-tenant data centers, and what happens ... » read more

Everyone’s A System Designer With Heterogeneous Integration


The move away from monolithic SoCs to heterogeneous chips and chiplets in a package is accelerating, setting in motion a broad shift in methodologies, collaborations, and design goals that are felt by engineers at every step of the flow, from design through manufacturing. Nearly every engineer is now working or touching some technology, process, or methodology that is new. And they are inter... » read more

Reliability Performance Of S-Connect Module (Bridge Technology) For Heterogeneous Integration Packaging


Bridge technology is a promising heterogeneous integration (HI) solution for application-specific integrated circuits (ASICs) and high bandwidth memory (HBM). The bridge dies provide localized communications among the multiple system on chips (SoCs) in a single package. In Amkor's bridge technology, S-Connect provides die-to-die connections with fine pitch [1]. Prototype S-Connect technology wa... » read more

Why Chiplets Don’t Work For All Designs


Experts at the Table: Semiconductor Engineering sat down to discuss use cases and challenges for commercial chiplets with Saif Alam, vice president of engineering at Movellus; Tony Mastroianni, advanced packaging solutions director at Siemens Digital Industries Software; Mark Kuemerle, vice president of technology at Marvell; and Craig Bishop, CTO at Deca Technologies. What follows are excerpts... » read more

The Glass Substrate Question: When Will It Replace Copper Clad Laminate?


"When will glass replace copper clad laminate on advanced IC substrates?" That’s a question many on the heterogeneous integration (HI) side of the semiconductor industry are asking. Unfortunately, the answer is not straightforward. But before we get to answering that, let’s take an advanced IC substrate (AICS) refresher. In other words, how did we get to the point where glass substrat... » read more

Who Will Regulate Data Exchanges In Chiplets?


Scaling is still important when it comes to logic and low power, but it's no longer the main avenue for improving performance. What used to be a single chip, comprised of various IP blocks and components on a single SoC, is giving way to a heterogeneous collection of chiplets — at least for the big chipmakers and system companies at the leading edge. Chiplets are currently the best solutio... » read more

The Road Ahead For SoCs In Self-Driving Vehicles


Automakers have relied on a human driver behind the wheel for more than a century. With Level 3 systems in place, the road ahead leads to full autonomy and Level 5 self-driving. However, it’s going to be a long climb. Much of the technology that got the industry to Level 3 will not scale in all the needed dimensions — performance, memory usage, interconnect, chip area, and power consumption... » read more

Smarter Systems Through Heterogeneous Integration: Highlights From 3D & Systems Summit


It has taken decades of research and development and strong commitment to various industry programs, but the stars are finally aligning for 3D semiconductor systems. No one could have left the 3D & Systems Summit 2023 – held in late June in Dresden – with any doubt that heterogeneous integration, enabled by increasingly mature 3D packaging technologies, is becoming a key driver of the s... » read more

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