High-NA EUV Progress And Problems

By Gregory Haley - 22 Aug, 2023 - Comments: 0

High-NA EUV will enable logic scaling for at least the next couple process nodes. It’s complex, expensive, and a feat of optical engineering, but there are a lot of components with mixed progress. Harry Levinson, principal lithographer at HJL Lithography, talks about when this technology will likely show up, what problems still need to be resolved, and what comes next. Related Readin... » read more

High-NA Lithography Starting To Take Shape

By Gregory Haley - 25 Jul, 2023 - Comments: 3

The future of semiconductor technology is often viewed through the lenses of photolithography equipment, which continues to offer better resolution for future process nodes despite an almost perpetual barrage of highly challenging technological issues. For years, lithography was viewed as the primary manufacturing-related gating factor to continued device scaling, beset by multiple delays th... » read more

193i Lithography Takes Center Stage…Again

By Gregory Haley - 15 Jun, 2023 - Comments: 0

Cutting-edge lithography to create smaller features increasingly is being supplemented by improvements in lithography for mature process nodes, both of which are required as SoCs and complex chips are decomposed and integrated into advanced packages. Until the 7nm era, the primary goal of leading-edge chipmakers was to pack everything onto a single system-on-chip (SoC) using the same process... » read more

Assist Layers: The Unsung Heroes of EUV Lithography

By Katherine Derbyshire - 20 Apr, 2023 - Comments: 0

Most discussions of advanced lithography focus on three elements — the exposure system, photomasks, and photoresists — but that's only part of the challenge. Successfully transferring a pattern from the photomask to a physical structure on the wafer also depends on a variety of films working together, including the underlayers, the developers, and a variety of surface treatments. In fact... » read more

Challenges Grow For CD-SEMs At 5nm And Beyond

By Gregory Haley - 11 Apr, 2023 - Comments: 1

CD-SEM, the workhorse metrology tool used by fabs for process control, is facing big challenges at 5nm and below. Traditionally, CD-SEM imaging has relied on a limited number of image frames for averaging, which is necessary both to maintain throughput speeds and to minimize sample damage from the electron beam itself. As dimensions get smaller, these limitations result in higher levels of n... » read more

Tech Forecast: Fab Processes To Watch Through 2040

By Laura Peters - 16 Mar, 2023 - Comments: 0

The massive proliferation of semiconductors in more markets, and more applications within those markets, is expected to propel the industry to more than $1 trillion by 2030. But over the next 17 years, semiconductors will reach well beyond the numbers, changing the way people work, how they communicate, and how they measure and monitor their health and well-being. Chips will be the enabling ... » read more

New Challenges Emerge With High-NA EUV

By Katherine Derbyshire - 16 Mar, 2023 - Comments: 3

High numerical aperture EUV exposure systems are coming — as soon as 2025 by some estimates. Though certainly a less profound change than the introduction of extreme ultraviolet lithography, high-NA lithography still brings a new set of challenges for photoresists and related materials. With a higher numerical aperture, photons strike the wafer at a shallower angle. That requires thinner p... » read more

Looking Forward To SPIE, And Beyond

By Katherine Derbyshire - 16 Feb, 2023 - Comments: 0

On the eve of this year’s SPIE Advanced Lithography + Patterning conference, I took a look at the IEEE Devices and Systems Roadmap’s lithography section. It’s especially notable for the emergence of EUV lithography, which has quickly become critical for advanced logic. High-NA tools to support still smaller dimensions are on the horizon. In the near-term, though, the key challenge is not ... » read more

Devices And Transistors For The Next 75 Years

By Laura Peters - 16 Feb, 2023 - Comments: 0

The 75th anniversary of the invention of the transistor sparked a lively panel discussion at IEDM, spurring debate about the future of CMOS, the role of III-V and 2D materials in future transistors, and what will be the next great memory architecture.[1] Industry veterans from the memory, logic, and research communities see high-NA EUV production, NAND flash with 1,000 layers, and hybrid bon... » read more

High-NA EUV Complicates EUV Photomask Future

By Jan Willis - 17 Nov, 2022 - Comments: 0

The eBeam Initiative’s 11th annual Luminaries survey in 2022 reported EUV fueling growth of the semiconductor photomask industry while a panel of experts cited a number of complications in moving to High-NA EUV during an event co-located with the SPIE Photomask Technology Conference in late September. Industry luminaries representing 44 companies from across the semiconductor ecosystem partic... » read more

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