Different Approaches Emerge For Stacking Die

By Ed Sperling - 21 Aug, 2014 - Comments: 1

The concept of stacking die to shorten wires, improve performance, and reduce the amount of energy required to drive signals has been in research for at least the past dozen years at both IBM and Intel. And depending upon whom you ask, it could be another 2 to 10 years before it becomes a mainstream packaging approach—if it happens at all. At least part of the confusion stems from how you ... » read more

Blog Review: Aug. 20

By Ed Sperling - 20 Aug, 2014 - Comments: 0

Ansys’ Bill Vandermark highlights the top five engineering articles of the week. Check out the “Sprouting Baby Monitor.” This may be a sign of what the IoT is really good for. You can also use your cat (or dog or even your kids) to hack your neighbor’s Wi-Fi. Cadence’s Richard Goering says gaps may be narrowing between available tools and what’s needed for 3D-IC design. Now all w... » read more

Manufacturing Bits: Aug. 19

By Mark LaPedus - 19 Aug, 2014 - Comments: 0

28nm brain chips DARPA-funded researchers have developed a 28nm chip that mimics the brain. The low-power chip is inspired by the neuronal structure of the brain. Designed by researchers at IBM under DARPA’s Systems of Neuromorphic Adaptive Plastic Scalable Electronics (SyNAPSE) program, the chip consists of 5.4 billion transistors. Built on Samsung’s 28nm foundry process, the chip has ... » read more

Ion Implanter Market Heats Up

By Mark LaPedus - 14 Aug, 2014 - Comments: 0

The ion implanter market has been a stable, if not a sleepy, business. The last big event took place in 2011, when Applied Materials re-entered the ion implanter market by acquiring Varian, the world’s leading supplier of these tools. The acquisition gave Applied Materials a commanding 80% share of the implanter business, with the other players fighting for the crumbs. But after year... » read more

DSA: Hype Or Revolution?

By Michael Watts - 14 Aug, 2014 - Comments: 0

Directed self-assembly (DSA) has become the subject of a great deal of research attention in the lithography world, to the point where there were dedicated sessions at this year’s Advanced Lithography conference in February. So is this just another passing research fad, or is it a technology that will revolutionize semiconductor manufacturing? DSA utilizes a block copolymer that effectivel... » read more

This Is What 450mm Wafers Look Like

By SEMI - 14 Aug, 2014 - Comments: 0

The first fully patterned 450mm wafers were on display at SEMICON West 2014 in South Hall and also showcased in the 450mm Technology Development Session. Fully patterned 450mm wafers produced using Molecular Imprints’ Imprio nanoimprint lithography (NIL) tool have been shown before (including at SEMI ISS meeting in January 2013). However, the 450mm wafers on display at SEMICON West were produ... » read more

Plotting IBM Micro’s Future

By Mark LaPedus - 14 Aug, 2014 - Comments: 1

It’s been a wild ride for IBM’s Microelectronics Group. Neither IBM, nor the other parties involved, have made any public comments about the recent events concerning IBM Micro. Much of the drama has played out in the media. Based on those reports, here’s a rough outline of the events. Not long ago, IBM put its loss-ridden chip unit on the block to shore up the company’s bottom lin... » read more

The Week In Review: Design

By Ed Sperling - 08 Aug, 2014 - Comments: 0

Tools Cadence rolled out a custom power integrity tool for dealing with transistor-level electromigration and IR drop with SPICE-level accuracy. It works in conjunction with the company’s existing power integrity tool for cell-level power signoff. Open-Silicon established a high-speed SerDes technology center of excellence to speed design and production of ASICs using high-speed serial co... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?