tag: Infineon

Chip Industry Week In Review
By The SE Staff - 13 Oct, 2023 - Comments: 0

By Liz Allan, Jesse Allen, and Karen Heyman. Canon uncorked a nanoimprint lithography system, which the company said will be useful down to about the 5nm node. Unlike traditional lithography equipment, which projects a pattern onto a resist, nanoimprint directly transfers images onto substrates using a master stamp patterned by an e-beam system. The technology has a number of limitations and... » read more

Do You Really Understand The Importance Of Parasitic Extraction In Chip Designs?
By Karen Chow - 12 Oct, 2023 - Comments: 0

By Susanne Lachenmann and Petya Aleksandrova, Infineon Technologies, and Karen Chow, Siemens EDA One of the biggest challenges integrated circuit (IC) designers face in today’s complex designs is effectively managing the effects of parasitic elements such as resistance, capacitance, and inductance. Parasitic elements can significantly impact chip performance of a chip, making it critical f... » read more

Chip Industry Week In Review
By The SE Staff - 06 Oct, 2023 - Comments: 0

By Jesse Allen, Liz Allan, and Gregory Haley A potential government shutdown beginning in November would be "massively disruptive" for the Commerce Department as it continues to disburse critical funding featured in the CHIPS Act to boost semiconductor research and development in the U.S., according to Secretary Gina Raimondo. Global semiconductor industry sales totaled $44 billion in Aug... » read more

The Ultimate Guide To PCB Layout For GaN Transistors
By Francesco Di Domenico - 05 Oct, 2023 - Comments: 0

In the ever-evolving landscape of power electronics, the emergence of gallium nitride (GaN) transistors has ignited a revolution by offering unparalleled benefits, including remarkable efficiency and power density enhancements. The art of PCB layout has been a crucial component in power electronic design for over four decades now, ever since the advent of switching power supplier. From the ea... » read more

Making Sensors More Reliable
By Karen Heyman - 05 Oct, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to talk about the latest issues in sensors with Prakash Madhvapathy, director of product marketing, Tensilica audio/voice DSPs group at Cadence; Kevin Hughes, senior product manager for MEMS sensors at Infineon; and Matthew Hogan, product management director at Siemens EDA. What follows are excerpts of that conversation. [L-R] Kevin ... » read more

Gearing Up For Level 4 Vehicles
By John Koon - 05 Oct, 2023 - Comments: 0

More autonomous features are being added into high-end vehicles, but getting to full autonomy will likely take years more effort, a slew of new technologies — some of which are not in use today, and some of which involve infrastructure outside the vehicle — along with sufficient volume to bring the cost of these combined capabilities down to an affordable price point. In the meantime, ma... » read more

Higher Automotive MCU Performance With Interface IP
By Ron DiGiuseppe - 05 Oct, 2023 - Comments: 1

By Ron DiGuiseppe and Hezi Saar AI is making waves across many industries, and automotive is no exception. Today’s vehicles are smarter and more connected than ever, and AI is at the heart of it all. Many new advanced driver assistance system (ADAS) applications, such as automatic emergency braking, adaptive cruise control, and lane-keeping assistance, are built using the latest AI algorit... » read more

Usage Of Pulse-Edge Transformer In Secondary Controlled Flyback Applications
By Infineon - 04 Oct, 2023 - Comments: 0

The pulse-edge transformer (PET) is used as a medium to transmit PWM pulses from a secondary-side controller, such as EZ-PD™ PAGxS, to a primary-side controller, such as EZ-PD™ PAGxP, for AC/DC applications targeting the power adapter segment. This article explains the advantages of PET over the conventional opto-coupler based approach. Click here to read more. » read more

Blog Review: October 4
By Jesse Allen - 04 Oct, 2023 - Comments: 0

Cadence's Felipe Goncalves checks out the Integrity and Data Encryption (IDE) feature in PCIe 6.0, a new layer inserted between the transection layer and data link layer with the goal of protecting against threats from physical attacks on the link. Siemens' Robin Bornoff, Daniel Berger, and Kai Liu explore the potential for large language models (LLMs) make the use of CAE tools simpler, more... » read more

Chip Industry Week In Review
By The SE Staff - 29 Sep, 2023 - Comments: 0

By Susan Rambo, Liz Allan, and Gregory Haley. TSMC rolled out the second version of its 3Dblox, which creates an infrastructure for stacking chiplets and other necessary components in a package, along with a standardized way of achieving that. Two novel features are chiplet mirroring for design reuse, and what is basically sandbox for power and thermal analysis of different design elements. ... » read more

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