Hyperscaling The Data Center

By Kevin Fogarty - 07 Dec, 2017 - Comments: 1

Enterprise data centers increasingly will look and behave more like slimmed-down versions of hyperscale data centers as chipmakers and other suppliers adapt systems developed for their biggest customers to in-house IT faciilities. The new chips and infrastructure that will serve as building blocks in these facilities will be more power-efficient, make better use of space and generate less he... » read more

Blog Review: Dec. 6

By Jesse Allen - 06 Dec, 2017 - Comments: 0

Synopsys' Eric Huang examines electromagnetic interference, the Bit Error Rate in USB 3.2 and how different transfer types handle errors. Mentor's Nitin Bhagwath points out several things that can cause DDR signals to behave badly, from excessive ringing to stubs in the channel. Cadence's Paul McLellan listens in as Oski CEO Vigyan Singhal explains the basics of assertion-based verificati... » read more

Manufacturing Bits: Dec. 5

By Mark LaPedus - 05 Dec, 2017 - Comments: 3

Intel vs. GlobalFoundries At the IEEE International Electron Devices Meeting (IEDM) this week, GlobalFoundries and Intel will square off and present papers on their new logic processes. Intel will present more details about its previously-announced 10nm finFET technology, while GlobalFoundries will discuss its 7nm finFET process. As expected, Intel and GlobalFoundries will use 193nm immersi... » read more

The Week in Review: IoT

By Jeff Dorsch - 01 Dec, 2017 - Comments: 0

Products/Services At this week’s AWS re:Invent conference in Las Vegas, Nevada, Amazon Web Services introduced a number of products and services for the Internet of Things, machine learning, and other areas. These include Amazon FreeRTOS (an operating system for IoT microcontrollers), AWS IoT Device Defender (security management), AWS IoT 1-Click, AWS IoT Device Management, AWS IoT Analytics... » read more

Prototyping Partitioning Problems

By Ann Mutschler - 30 Nov, 2017 - Comments: 0

Gaps are widening in the prototyping of large, complex chips because the speed and capacity of the FPGA is not keeping pace with rapid rollout pace of advanced ASICs. This is a new twist for a well-established market. Indeed, prototyping with FPGAs is as old as the [gettech id="31071" t_name="FPGAs"] themselves. Even before they were called FPGAs, logic accelerators or LCAs (logic cell ar... » read more

The New Road Warriors

By Jeff Dorsch - 27 Nov, 2017 - Comments: 0

Chip vendors and other companies that have little or no experience in automotive are flooding into this market as the race for assisted and autonomous driving begins to heat up. This market is expected to pay big dividends for companies that succeed in helping to build the vehicles of the future in this century. IC Insights earlier this year forecast the auto chip market would grow 22% this ... » read more

The Week In Review: Manufacturing

By Mark LaPedus - 22 Nov, 2017 - Comments: 0

Market research For the first time since 1993, the semiconductor industry has a new number one supplier in terms of sales—Samsung. Samsung is forecast to top Intel as the #1 semiconductor supplier in 2017, according to IC Insights. "Samsung first charged into the top spot in 2Q17 and displaced Intel, which had held the number 1 ranking since 1993," according to the firm. "In 1Q16, Intel’s ... » read more

Week In Review: Design

By Linda Christensen - 22 Nov, 2017 - Comments: 0

Acquisitions Marvell signed a definitive agreement to buy Cavium for roughly $6 billion. The deal is expected to close in mid-2018. The Cavium deal fits squarely on the cloud side and gives Marvell a much bigger reach into enterprise networking and infrastructure, as well as some developing markets. Siemens paid an undisclosed price to buy Solido Design Automation, which tracks variation i... » read more

Deals: Mentor-Solido, Marvell-Cavium

By Ed Sperling - 20 Nov, 2017 - Comments: 0

Marvell today signed a definitive agreement to buy Cavium for roughly $6 billion, ending weeks of speculation about whether the deal would go through. And Mentor, a Siemens business, paid an undisclosed price to buy Solido Design Automation, which tracks variation in complex designs. Both deals are part of a new flurry of M&A activity across the semiconductor industry as the industry ret... » read more

Five Trends In IC Packaging

By Mark LaPedus - 16 Nov, 2017 - Comments: 0

At one time, chip packaging was an afterthought. Chipmakers were more worried about IC design. Packaging was considered a mere commodity, which was simply used to house the design. More recently, though, chip packaging has become a hot topic. The IC design is still important, but packaging is a key part of the solution. In fact, the industry can go down two paths. The traditional way is t... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?