New Standards Push Co-Packaged Optics


Co-packaged optics (CPOs) promise five times the bandwidth of pluggable connections, but the new architecture requires multiple changes to accommodate different applications. The Optical Internetworking Forum (OIF) recently published standards for co-packaged optics, which are the photonic industry’s hope for handling today’s faster Ethernet interfaces, as well as increasing speeds and p... » read more

Week In Review: Semiconductor Manufacturing, Test


GlobalFoundries filed suit in U.S. District Court in New York against IBM, accusing it of unlawfully disclosing IP and trade secrets to IBM partners, including Intel and Rapidus, potentially receiving hundreds of millions of dollars in licensing income and other benefits. The European Union released a €43 billion ($47 billion) plan for jumpstarting its semiconductor manufacturing industry,... » read more

Week In Review: Design, Low Power


Cadence rolled out a slew of new products at this week’s CDNLive Silicon Valley, including: A new generative AI-powered tool for analog, mixed-signal, RF and photonics design; An extended collaboration with TSMC and Microsoft to advance giga-scale physical verification system in the cloud; A multi-year partnership with the San Francisco 49ers football organization, focused on sust... » read more

Week In Review: Auto, Security, Pervasive Computing


Pervasive computing Broadcom announced delivery of its Jericho3-AI fabric for artificial intelligence (AI) networks, which delivers 26 petabits per second of Ethernet bandwidth. That is roughly four times the bandwidth of the previous generation, at a 40% power savings per gigabit. AMD released the Ryzen Embedded 5000 Series processors for customers requiring power-efficient processors opt... » read more

Week In Review: Semiconductor Manufacturing, Test


U.S. Senate Majority Leader Chuck Schumer said he launched an effort to establish rules on artificial intelligence to address national security and education concerns, Reuters reported. "Time is of the essence to get ahead of this powerful new technology to prevent potentially wide-ranging damage to society and national security and instead put it to positive use by advancing strong, bipartisan... » read more

Week In Review: Design, Low Power


Arm and Intel Foundry Services inked a multi-generation agreement to enable chip designers to build Arm-based SoCs on the Intel 18A process. The initial focus is mobile SoC designs, but the deal allows for potential expansion into automotive, IoT, data center, aerospace, and government applications. IFS and Arm will undertake design technology co-optimization (DTCO) to optimize chip design and ... » read more

RISC-V Driving New Verification Concepts


Semiconductor Engineering sat down to discuss gaps in tools and why new methodologies are needed for RISC-V processors, with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, ... » read more

Chiplet Security Risks Underestimated


The semiconductor ecosystem is abuzz with the promise of chiplets, but there is far less attention being paid to security in those chiplets or the heterogeneous systems into which they will be integrated. Disaggregating SoCs into chiplets significantly alters the cybersecurity threat landscape. Unlike a monolithic multi-function chip, which usually is manufactured using the same process tech... » read more

Week In Review: Semiconductor Manufacturing, Test


The U.S. Commerce Department outlined proposed rules for the Chips for America Incentives Program, including additional details on national security measures applicable to the CHIPS Incentives Program included in the CHIPS and Science Act. The rules limit funding recipients from investing in the expansion of semiconductor manufacturing in foreign countries of concern, notably the People’s Rep... » read more

Week In Review: Design, Low Power


Synopsys rolled out an AI-driven design suite called Synopsys.ai at the Synopsys User Group conference this week, which it says reduces time to better results at multiple points in the design flow. The company noted the new technology uses reinforcement learning, which compensates for relatively small data sets by allowing engineers to interact with that data more easily at any point, and to ch... » read more

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