Leveraging IBIS-AMI Models To Optimize PCIe 6.0 Designs


The exploding demand for more data driven by advancements such as artificial intelligence and machine learning has created an increase in bandwidth (BW) for interconnects for different systems and hardware components such as graphic cards, network cards, storge devices, CPUs, memories, and many more. PCIe is the leading high-speed serial communication protocol for connecting such hardware compo... » read more

LAB Flip Chip Reflow Process Robustness Prediction By Thermal Simulation


By Gabriel Chang and Ricky Zang Nowadays, there are many interconnects in IC chips. One of the packaging goals is to connect an IC to the next level of subsystem circuitry (package substrates/print circuit boards). Mass reflow (MR) of solder joints is a widely adapted and stable process in the industry. The applications of MR include flip chip, ball mounting, surface mount technology (SMT), ... » read more

Ensuring The Health And Reliability Of Multi-Die Systems


From generative AI tools that rapidly produce chatbot responses to high-performance computing (HPC) applications enabling financial forecasting and weather modeling, it’s clear we’re in a whole new realm of processing power demand. Given these compute-intensive workloads, monolithic SoCs are no longer capable to meet today’s processing needs. Engineering ingenuity, however, has answered t... » read more

Using Smart Data To Boost Semiconductor Reliability


The chip industry is looking to AI and data analytics to improve yield, operational efficiency, and reduce the overall cost of designing and manufacturing complex devices. In fact, SEMI estimates its members could capture more than $60B in revenues associated through smart data use and AI. Getting there, however, requires overcoming a number of persistent obstacles. Smart data utilization is... » read more

Building Better Bridges In Advanced Packaging


The increasing challenges and rising cost of logic scaling, along with demands for an increasing number of features, are pushing more companies into advanced packaging. And while that opens up a slew of new options, it also is causing widespread confusion over what works best for different processes and technologies. At its core, advanced packaging depends on reliable interconnects, well-def... » read more

Mitigating Electromigration In Chip Design


From smartphones to laptops, we use a variety of devices every day that rely on integrated circuits (ICs), or chips, to function. These chips are made up of thousands of transistors and interconnects, which transmit electrical signals from one part of the chip to another. But as demand for speed and complexity forces more energy through ever-smaller devices, this concentrated current flow can t... » read more

The Future Of Chiplet Reliability


Chipmakers are increasingly turning to advanced packaging to overcome the reticle size limit of silicon manufacturing without increasing transistor density. This method also allows hybrid devices with dies in different process nodes while improving yield, which decreases exponentially with size. However, 2.5D/3D designs introduce a fair share of new challenges, one of the most significant be... » read more

Impact of CMOS Image Sensors Fabrication Processes On The Quality Of Smartphone Pictures


A technical paper titled “A Review of the Recent Developments in the Fabrication Processes of CMOS Image Sensors for Smartphones” was published by researchers at Texas A&M University. Abstract: "CMOS Image Sensors are experiencing significant growth due to their capabilities to be integrated in smartphones with refined image quality. One of the major contributions to the growth of ima... » read more

Impacts Of Process Flow, Scaling, And Variability On Interconnect Performance


Virtual fabrication is used to evaluate the performance of interconnects (line and via resistance, capacitance, etc.) across pitches compatible with either EUV single exposure or SADP for three different process flows: single damascene, dual damascene, and semi-damascene (subtractive metal etch). The effects of process variation for the three flows are also investigated to determine the relativ... » read more

Chiplet Security Risks Underestimated


The semiconductor ecosystem is abuzz with the promise of chiplets, but there is far less attention being paid to security in those chiplets or the heterogeneous systems into which they will be integrated. Disaggregating SoCs into chiplets significantly alters the cybersecurity threat landscape. Unlike a monolithic multi-function chip, which usually is manufactured using the same process tech... » read more

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