tag: interconnects

SiC Power Electronics Packaging: Floating Die Structure and Liquid Metal Fluidic Connection (Cambridge U. )
By Technical Paper Link - 17 Jul, 2024 - Comments: 0

A new technical paper titled "Liquid Metal Fluidic Connection and Floating Die Structure for Ultralow Thermomechanical Stress of SiC Power Electronics Packaging" was published by researchers at Cambridge University. Abstract "Coefficients of thermal expansion (CTE) of various materials in packaging structure layers vary largely, causing significant thermomechanical stress in power electroni... » read more

Cadence Janus NoC System IP
By Cadence - 17 Jul, 2024 - Comments: 0

The Cadence Janus Network on Chip (NoC) is a new highly configurable soft IP designed to speed up the system-on-chip (SoC) and full system design cycle by reducing some of the problems associated with large SoCs. With many more processing nodes, as well as memory and I/O nodes designed into the SoC, the interconnect becomes a major design hurdle. Wiring congestion and wire loads introduce ch... » read more

Ruthenium Interconnects On Tap
By Katherine Derbyshire - 20 Jun, 2024 - Comments: 0

Chipmakers' focus on new interconnect technology is ramping up as copper's effectiveness continues to diminish, setting the stage for a significant shift that could improve performance and reduce heat at future nodes and in advanced packages. The introduction of copper interconnects in 1997 upended the then-standard tungsten via/aluminum line metallization scheme. Dual damascene integration ... » read more

Interconnects: Criteria For Alternative Metal Benchmarking And Selection (Imec, KU Leuven)
By Technical Paper Link - 19 Jun, 2024 - Comments: 0

A technical paper titled “Selecting Alternative Metals for Advanced Interconnects” was published by researchers at imec and KU Leuven. Abstract “Today, interconnect resistance and reliability are key limiters for the performance of advanced CMOS circuits. As transistor scaling is slowing, interconnect scaling has become the main driver for circuit miniaturization, and interconnect lim... » read more

Materials And Technologies For High Temperature, Resilient Electronics
By Technical Paper Link - 07 May, 2024 - Comments: 0

A technical paper titled “Materials for High Temperature Digital Electronics” was published by researchers at University of Pennsylvania, Air Force Research Laboratory, and Ozark Integrated Circuits. Abstract: "Silicon microelectronics, consisting of complementary metal oxide semiconductor (CMOS) technology, have changed nearly all aspects of human life from communication to transportatio... » read more

Interconnects Essential To Heterogeneous Integration
By Karen Heyman - 28 Mar, 2024 - Comments: 0

Designing and manufacturing interconnects is becoming more complex, and more critical to device reliability, as the chip industry shifts from monolithic planar dies to collections of chips and chiplets in a package. What was once as simple as laying down a copper trace has evolved into tens of thousands of microbumps, hybrid bonds, through-silicon vias (TSVs), and even junctions for optical ... » read more

An All-Optical General-Purpose CPU And Optical Computer Architecture (Akhetonics)
By Technical Paper Link - 11 Mar, 2024 - Comments: 0

A technical paper titled “An All-Optical General-Purpose CPU and Optical Computer Architecture” was published by researchers at Akhetonics. Abstract: "Energy efficiency of electronic digital processors is primarily limited by the energy consumption of electronic communication and interconnects. The industry is almost unanimously pushing towards replacing both long-haul, as well as local c... » read more

Shedding More Light On Photonics For Multi-Die Systems
By Kenneth Larsen - 21 Dec, 2023 - Comments: 0

By Kenneth Larsen and Twan Korthorst Photonics harness the speed of light for fast, low-power, high-capacity data transfer. A tremendous amount of data needs to be moved swiftly across different components in a multi-die system. Considering this, exploiting the advantages of light is one way to mitigate heat dissipation and energy consumption concerns while delivering fast data transmission.... » read more

Leveraging IBIS-AMI Models To Optimize PCIe 6.0 Designs
By Synopsys - 12 Dec, 2023 - Comments: 0

The exploding demand for more data driven by advancements such as artificial intelligence and machine learning has created an increase in bandwidth (BW) for interconnects for different systems and hardware components such as graphic cards, network cards, storge devices, CPUs, memories, and many more. PCIe is the leading high-speed serial communication protocol for connecting such hardware compo... » read more

LAB Flip Chip Reflow Process Robustness Prediction By Thermal Simulation
By Gabriel Chang - 16 Nov, 2023 - Comments: 0

By Gabriel Chang and Ricky Zang Nowadays, there are many interconnects in IC chips. One of the packaging goals is to connect an IC to the next level of subsystem circuitry (package substrates/print circuit boards). Mass reflow (MR) of solder joints is a widely adapted and stable process in the industry. The applications of MR include flip chip, ball mounting, surface mount technology (SMT), ... » read more

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