tag: IP

Wanted: More Fab Tool Part Standards
By Mark LaPedus - 15 Aug, 2019 - Comments: 0

As chipmakers ramp up the next wave of processes and grapple with how to reduce defect levels, they are encountering problems from an unlikely source—components inside of the fab equipment. Defects are unwanted deviations in chips, which impact yields and device performance. Typically, they are caused by an unforeseen glitch during the process flow. But a lesser-known problem involves defe... » read more

Power Modeling Standard Released
By Brian Bailey - 14 Aug, 2019 - Comments: 0

Power is becoming a more important aspect of semiconductor design, but without an industry standard for power models, adoption is likely to be slow and fragmented. That is why Si2 and the IEEE decided to do something about it. Back in 2014, the IEEE expanded its interest in power standards with the creation of two new groups IEEE P2415 - Standard for Unified Hardware Abstraction and Layer fo... » read more

Configure, Confirm, Ship
By Synopsys - 07 Aug, 2019 - Comments: 0

Security is a first-order design requirement for processor-based systems. Processor designers implement security functionality directly into the hardware itself to protect the system at its most fundamental layer. System integrators that use processor IP such as Synopsys’ DesignWare® ARC® processors must ensure that they configure and manage the protection and security features correctly, a... » read more

Where Should Auto Sensor Data Be Processed?
By Ann Mutschler - 01 Aug, 2019 - Comments: 0

Fully autonomous vehicles are coming, but not as quickly as the initial hype would suggest because there is a long list of technological issues that still need to be resolved. One of the basic problems that still needs to be solved is how to process the tremendous amount of data coming from the variety of sensors in the vehicle, including cameras, radar, LiDAR and sonar. That data is the dig... » read more

Hardware-Software Co-Design Reappears
By Brian Bailey - 25 Jul, 2019 - Comments: 1

The core concepts in hardware-software co-design are getting another look, nearly two decades after this approach was first introduced and failed to catch on. What's different this time around is the growing complexity and an emphasis on architectural improvements, as well as device scaling, particularly for AI/ML applications. Software is a critical component, and the more tightly integrate... » read more

EDA, IP Grow 16.3%
By Ed Sperling - 08 Jul, 2019 - Comments: 0

EDA and IP revenue rebounded in Q1, with all geographies reporting increases, according to the ESD Alliance Market Statistics Service. Total revenue increased to 16.3% to $2.606 billion, up from $2.241 billion in the same period in 2018. The global numbers do not reflect the impact of a trade war between the United States and China, which occurred in Q2, but they do point to a significant re... » read more

Security’s Very Strange Path To Success
By Ed Sperling - 02 Jul, 2019 - Comments: 0

Security at the chip level appears to be heading toward a more promising future. The reason is simple—more people are willing to pay for security than in the past. For the most part, security is like insurance. You don't know it's working until something goes wrong, and you don't necessarily even know right away if there has been a breach. Sometimes it takes years to show up, because it ca... » read more

Enabling The RISC-V Ecosystem
By Tom Anderson - 27 Jun, 2019 - Comments: 0

Earlier this year, OneSpin’s Sven Beyer discussed the emerging RISC-V processor and some of its verification challenges. He stated that “RISC-V is hot and stands at the beginning of what may be a major shift in the industry.” In the few intervening months, it has become even more apparent that RISC-V is fundamentally changing system-on-chip (SoC) development. Dozens of commercial and open... » read more

Complete Formal Verification of RISC V Processor IPs for Trojan-Free Trusted ICs
By OneSpin Solutions - 26 Jun, 2019 - Comments: 0

RISC-V processor IPs are increasingly being integrated into system-on-chip designs for a variety of applications. However, there is still a lack of dedicated functional verification solutions supporting high-integrity, trusted integrated circuits. This paper examines an efficient, novel, formal-based RISC-V processor verification methodology. The RISC-V ISA is formalized in a set of Operational... » read more

Building Your First Chip For Artificial Intelligence? Read This First
By Ron Lowman - 13 Jun, 2019 - Comments: 0

As artificial intelligence (AI) capabilities enter new markets, the IP selected for integration provides the critical components of the AI SoC. But beyond the IP, designers are finding a clear advantage in leveraging AI expertise, services, and tools to ensure the design is delivered on time, with a high level of quality and value to the end customer for new and innovative applications. Over... » read more

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