Collaborative IC Design Mandates Integrated Data Management

By Cliosoft - 11 Feb, 2019 - Comments: 0

Over the last decade, design teams have encountered increased competition due to globalization (requiring the best available engineers irrespective of location), an exponential increase in design complexity, and shrinking market windows. This results in teams of engineers with different skill sets (for example analog, digital, MEMS, and RF), spread across multiple sites, managing complex flows,... » read more

ISO 26262:2018, 2nd Edition: What Changes?

By Kurt Shuler - 07 Feb, 2019 - Comments: 0

If you’re involved somehow in design for automotive electronics, you probably have more than a cursory understanding of the ISO 26262 standard. What your organization is working from is most likely the 2011 definition. The most recent update is formally known as ISO 26262:2018, less formally as ISO 26262 2nd Edition. Figure 1. Overview of the ISO 26262:2018 series of standards (Source IS... » read more

Pushing AI Into The Mainstream

By Brian Bailey - 31 Jan, 2019 - Comments: 0

Artificial intelligence is emerging as the driving force behind many advancements in technology, even though the industry has merely scratched the surface of what may be possible. But how deeply AI penetrates different market segments and technologies, and how quickly it pushes into the mainstream, depend on a variety of issues that still must be resolved. In addition to a plethora of techni... » read more

Realizing the Benefits of 14/16nm Technologies

By eSilicon - 31 Jan, 2019 - Comments: 0

The scaling benefits of Moore’s Law are challenging below 28nm. It is no longer a given that the cost per gate will go down at process nodes below 28nm, e.g., 20nm though 14nm and 7nm. Rising design and manufacturing costs are contributing factors to this trend. Meanwhile, the competing trend of fewer but more complex system-on-chip (SoC) designs is reducing the knowledge base of many chip... » read more

EDA Grabs Bigger Slice Of Chip Market

By Brian Bailey - 31 Jan, 2019 - Comments: 0

EDA revenues have been a fairly constant percentage of semiconductor revenues, but that may change in 2019. With new customers creating demand, and some traditional customers shifting focus from advanced nodes, the various branches of the EDA tool industry may be where sticky technical problems are solved. IC manufacturing, packaging and development tools all are finding new ways to handle t... » read more

Chips&Media: Design and Verification of Deep Learning Object Detection IP

By Mentor, a Siemens Business - 30 Jan, 2019 - Comments: 0

Chips&Media, a leading provider of high-performance video IP for SoC design, took a unique approach to designing their latest IP for detecting objects in real time. They decided to adopt a new High-Level Synthesis (HLS) flow to implement their deep learning algorithm. But, they would have an RTL team create this algorithm, using traditional tools and another team would employ the Catapult H... » read more

Planning For 5G And The Edge

By Ed Sperling - 23 Jan, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss 5G and edge computing with Rahul Goyal, vice president in the technology and manufacturing group at Intel; John Lee, vice president and general manager of the semiconductor business unit at ANSYS; Rob Aitken, R&D fellow at Arm; and Lluis Paris, director of IP portfolio marketing at TSMC. What follows are excerpts of that conversation. Part one i... » read more

Mostly Upbeat Outlook For Chips

By Brian Bailey - 17 Jan, 2019 - Comments: 1

2019 has started with cautious optimism for the semiconductor industry, despite dark clouds that dot the horizon. Market segments such as cryptocurrencies and virtual reality are not living up to expectations, the market for smart phones appears to be saturated, and DRAM prices are dropping, leading to cut-backs in capital expenditures. EDA companies are talking about sales to China being pu... » read more

Developing Smarter, Safer Cars with ADAS IP

By Cadence - 16 Jan, 2019 - Comments: 0

By Charles Qi, Sr. Design Engineering Architect, and Neil Robinson, Product Marketing Director, IP Group, Cadence Today’s cars are a full-fledged electronic system on wheels, where every part is interrelated and must be designed, optimized, and verified simultaneously. As a result, it’s important to apply a holistic approach when developing automotive systems, taking into consideration t... » read more

IoT Merging Into Data-Driven Design

By Ed Sperling and Kevin Fogarty - 10 Jan, 2019 - Comments: 0

The Internet of Things is becoming more difficult to define and utilize for an effective business strategy. While an increasing number devices send data to the cloud or some local server, so much data is being generated and moved around that new strategies are being developed to rethink what needs to be processed where. Back in 2013, when the IoT concept really began taking off, connectivity... » read more

← Older posts Newer posts →

Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

tag: IP