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Waiting For Chiplet Standards


The need and desire for chiplets is increasing, but for most companies that shift will happen slowly until proven standards are in place. Interoperability and compatibility depend on many layers and segments of the supply chain coming to agreement. Unfortunately, fragmented industry requirements may lead to a plethora of solutions. Standards always have enabled increasing specialization. ... » read more

Designing 2.5D Systems


As more designs hit the reticle limit, or suffer from decreasing yield, migrating to 2.5D designs may provide a path forward. But this kind of advanced packaging also comes with some additional challenges. How you adapt and change your design team may be determined by where your focus has been in the past, or what you are trying to achieve. There are business, organizational, and technical c... » read more

Startup Funding: November 2020


Numerous chipmakers pulled in funding in November 2020, with investors putting money into interconnects, memories, AI hardware, and quantum computing. Launching from stealth was a startup aiming to combine AI and 5G. Autonomous delivery did well, too, with one company raising a massive $500M. This month, we take a look at 28 companies that raised a collective $1.1B. Semi & design Connec... » read more

Performance and Power Tradeoffs At 7/5nm


Semiconductor Engineering sat down to discuss power optimization with Oliver King, CTO at Moortec; João Geada, chief technologist at Ansys; Dino Toffolon, senior vice president of engineering at Synopsys; Bryan Bowyer, director of engineering at Mentor, a Siemens Business; Kiran Burli, senior director of marketing for Arm's Physical Design Group; Kam Kittrell, senior product management group d... » read more

Custom Designs, Custom Problems


Semiconductor Engineering sat down to discuss power optimization with Oliver King, CTO at Moortec; João Geada, chief technologist at Ansys; Dino Toffolon, senior vice president of engineering at Synopsys; Bryan Bowyer, director of engineering at Mentor, a Siemens Business; Kiran Burli, senior director of marketing for Arm's Physical Design Group; Kam Kittrell, senior product management group d... » read more

Power And Performance Optimization At 7/5/3nm


Semiconductor Engineering sat down to discuss power optimization with Oliver King, CTO at Moortec; João Geada, chief technologist at Ansys; Dino Toffolon, senior vice president of engineering at Synopsys; Bryan Bowyer, director of engineering at Mentor, a Siemens Business; Kiran Burli, senior director of marketing for Arm's Physical Design Group; Kam Kittrell, senior product management group d... » read more

What’s After PAM-4?


[This is part 2 of a 2-part series. Part 1 can be found here.] The future of high-speed physical signaling is uncertain. While PAM-4 remains one of the key standards today, there is widespread debate about whether PAM-8 will succeed it. This has an impact on everything from where the next bottlenecks are likely to emerge and the best approaches to solving them, to how chips, systems and p... » read more

High-Speed Signaling Drill-Down


Chip interconnect standards have received a lot of attention lately, with parallel versions proliferating for chiplets and serial versions moving to higher speeds. The lowliest characteristic of these interconnect schemes is the physical signaling format. Having been static at NRZ (non-return-to-zero) for decades, change is underway. “Multiple approaches are likely to emerge,” said Brig ... » read more

Week In Review: Auto, Security, Pervasive Computing


Security Ninety-one percent of commercial applications contain outdated or abandoned open-source components —a security threat, says Synopsys in its recently released report 2020 Open Source Security and Risk Analysis (OSSRA). In the fifth annual edition of the report, Synopsys’ research team in its Cybersecurity Research Center (CyRC) found that 99% of the 1,250 commercial codebases revie... » read more

Low-Power Analog


Analog circuitry is usually a small part of a large SoC, but it does not scale in the same way as digital circuitry under Moore's Law. The power consumed by analog is becoming an increasing concern, especially for battery-operated devices. At the same time, little automation is available to help analog designers reduce consumption. "Newer consumer devices, like smartphones and wearables, alo... » read more

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