Using Keysight Design Data Management SOS In The Cloud


Integrated circuits (ICs) are becoming increasingly complex and resource intensive. This is challenging companies to design chips more efficiently and reduce the overall impact of peak processing loads. Companies typically use large server farms and high-performance storage systems to design and validate chips quickly and efficiently. However, this approach is very resource intensive. For ex... » read more

Blog Review: December 13


Synopsys' Charles Dittmer discusses key and emerging use cases for Bluetooth Low Energy and how combining BLE with other wireless protocols can open new avenues of functionality for application areas including automotive, hearables, and retail. Cadence's Neelabh Singh points out changes in the terminologies describing USB4 links and shows the various possible link configurations put forth by... » read more

Auto Network Speeds Rise As Carmakers Prep For Autonomy


In-vehicle networks are starting to migrate from domain architectures to zonal architectures, an approach that will simplify and speed up communication in a vehicle using fewer protocols, less wiring, and ultimately lower cost. Zonal architectures will partition vehicles into zones that are more manageable and flexible, but getting there will take time. There is so much legacy technology in ... » read more

Blog Review: Dec. 6


Cadence's Vinod Khera checks out potential implications of generative AI for EDA, including how it could increase the learning rate of students and reduce the rising verification cost. Synopsys' Kiran Vittal considers the driving factors behind RISC-V's growth and why it is becoming increasingly important for applications ranging from automotive to 5G mobile, AI, and data centers. Siemens... » read more

Chip Industry Week In Review


By Susan Rambo, Gregory Haley, and Liz Allan Amkor plans to invest about $2 billion in a new advanced packaging and test facility in Peoria, Arizona. When finished, it will employ about 2,000 people and will be the largest outsourced advanced packaging facility in the U.S. The first phase of the construction is expected to be completed and operational within two to three years. Synopsys p... » read more

System State Challenges Widen


Knowing the state of a system is essential for many analysis and debug tasks, but it's becoming more difficult in heterogeneous systems that are crammed with an increasing array of features. There is a limit as to how many things engineers can keep track of, and the complexity of today's systems extends far beyond that. Hierarchy and abstraction are used to help focus on the important aspect... » read more

EDA Pushes Deeper Into AI


EDA vendors are ramping up the use of AI/ML in their tools to help chipmakers and systems companies differentiate their products. In some cases, that means using AI to design AI chips, where the number and breadth of features and potential problems is exploding. What remains to be seen is how well these AI-designed chips behave over time, and where exactly AI benefits design teams. And all o... » read more

Nascent Chiplet Tech Gaining Attention In Defense and Commercial Industries


The economic benefits derived from Moore's Law have changed, and not for the better. This shift – especially on the manufacturing side of system-on-chip (SoC) devices, has both the defense and commercial customers in the semiconductor industry wondering what will come next. One way to extend Moore's Law's cost, feature, and size benefits is with multi-chip technology, now commonly known as... » read more

Accelerate 5G Testing


The promise of 5G is faster and more reliable communications. To enable mobile broadband communications, 5G uses existing and new technologies to achieve extreme data throughputs. In this white paper, you will learn about the impact of the 3GPP evolution on your testing and solutions available to help you scale to production quickly. Click here to read more. » read more

Blog Review: November 29


Siemens' Matt Walsh checks out electro-thermal design and how a Boundary Condition Independent Reduced Order Model (BCI-ROM) can capture accurate characteristics from a 3D thermal analysis, ready for use in a 1D circuit simulation. Cadence's Vinod Khera considers how EDA could benefit from the AI revolution by providing a productivity boost through virtual assistants and improving code quali... » read more

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