Research Bits: Dec. 20


Patch tracks blood in deep tissue A skin-worn photoacoustic patch developed by a research team at the University of California San Diego is equipped with arrays of laser diodes and piezoelectric transducers to detect biomolecules in deep tissues, which usually would require a magnetic resonance imaging (MRI) and X-ray-computed tomography. The patch may help doctors tract hemoglobin in real tim... » read more

Chip Industry’s Technical Paper Roundup: Oct 25


New technical papers added to Semiconductor Engineering’s library this week. [table id=59 /] » read more

Memory-Computation Decoupling Execution To Achieve Ideal All-Bank PIM Performance


A new technical paper titled "Achieving the Performance of All-Bank In-DRAM PIM With Standard Memory Interface: Memory-Computation Decoupling" was published by researchers at Korea University. "This paper proposed the memory-computation decoupled PIM architecture to provide the performance comparable to the all-bank PIM while preserving the standard DRAM interface, i.e., DRAM commands, powe... » read more

Technical Paper Roundup: Aug. 30


New technical papers added to Semiconductor Engineering’s library this week. [table id=47 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

3D NAND: Scenarios For Scaling & Stacking


A new research paper titled "Impact of Stacking-Up and Scaling-Down Bit Cells in 3D NAND on Their Threshold Voltages" was published by researchers at Sungkyunkwan University and Korea University. Abstract "Over the past few decades, NAND flash memory has advanced with exponentially-increasing bit growth. As bit cells in 3D NAND flash memory are stacked up and scaled down together, some pote... » read more

Fully CMOS-compatible Ternary Inverter with a Memory Function Using Silicon Feedback Field-Effect Transistors (FBFETs)


New technical paper titled "New ternary inverter with memory function using silicon feedback field-effect transistors" was published from researchers at Korea University. Abstract: In this study, we present a fully complementary metal–oxide–semiconductor-compatible ternary inverter with a memory function using silicon feedback field-effect transistors (FBFETs). FBFETs operate with a pos... » read more

Technical Paper Round-Up: June 8


  New technical papers added to Semiconductor Engineering’s library this week. [table id=32 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a ... » read more

Addressing Vehicle Security Vulnerabilities With Structure-Aware CAN Fuzzing System


New technical paper titled "Efficient ECU Analysis Technology Through Structure-Aware CAN Fuzzing" from researchers at Soongsil University, Korea University, and Hansung University with funding from the Korean government. Abstract "Modern vehicles are equipped with a number of electronic control units (ECUs), which control vehicles efficiently by communicating with each other through the co... » read more

Technical Paper Round-Up: March 22


New memories, materials, and transistor types, and processes for making those devices, highlighted the past week's technical papers. That includes everything from vertical MoS2 to programmable black phosphorus image sensors and photonic lift-off processes for flexible thin-film materials. Papers continue to flow from all parts of the supply chain, with some new studies out of Pakistan, Seoul... » read more

NAND and NOR logic-in-memory comprising silicon nanowire feedback field-effect transistors


Abstract: "The processing of large amounts of data requires a high energy efficiency and fast processing time for high-performance computing systems. However, conventional von Neumann computing systems have performance limitations because of bottlenecks in data movement between separated processing and memory hierarchy, which causes latency and high power consumption. To overcome this hindra... » read more

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