Technical Paper Roundup: Aug. 30

3D NAND; RISC-V; CXL; quantum ML; in-memory for TinyML; matter-wave lithography; hardware trojans; 2D materials; radiation of nanoscale MOS transistors; 14 entangled photons


New technical papers added to Semiconductor Engineering’s library this week.

Technical Paper Research Organizations
Impact of Stacking-Up and Scaling-Down Bit Cells in 3D NAND on Their Threshold Voltages Sungkyunkwan University and Korea University
Static Hardware Partitioning on RISC-V — Shortcomings, Limitations, and Prospects Technical University of Applied Sciences (Regensburg, Germany) and Siemens AG -Corporate Research
TPP: Transparent Page Placement for CXL-Enabled Tiered Memory University of Michigan and Meta Inc
Generalization in quantum machine learning from few training data Technical University of Munich, Munich Center for Quantum Science and Technology (MCQST), Caltech, and Los Alamos National Lab
Efficient generation of entangled multiphoton graph states from a single atom Max Planck Institute of Quantum Optics
A processing-in-pixel-in-memory paradigm for resource-constrained TinyML applications University of Southern California (USC)
Realistic mask generation for matter-wave lithography via machine learning University of Bergen (Norway)
Automatic Hardware Trojan Insertion using Machine Learning University of Florida and Stanford University
Emerging reconfigurable electronic devices based on two-dimensional materials: A review TU Dresden, NaMLAb gGmbH, and RWTH Aachen University
Effects Of Size Scaling And Device Architecture On The Radiation Response Of Nanoscale MOS Transistors Vanderbilt University, Nashville, Tennessee. The work was partially supported by the Defense Threat Reduction Agency and by the U.S. Air Force Office of Scientific Research and Air Force Research Laboratory

Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting links to papers.

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