Accelerating Semiconductor Process Development Using Virtual Design Of Experiments


Design of Experiments (DOE) are a powerful concept in semiconductor engineering research and development. DOEs are sets of experiments used to explore the sensitivity of experimental variables and their effect on final device performance. A well-designed DOE can help an engineer achieve a targeted semiconductor device performance using a limited number of experimental wafer runs. However, in se... » read more

Precision Selective Etch And The Path To 3D


Scaling (the shrinking of the tiny devices in chips such as transistors and memory cells) has never been easy, but making the next generation of advanced logic and memory devices a reality requires creating new structures at the atomic scale. When working with dimensions this small, there is little room for variation. Compounding the problem is a need to remove material isotropically, or, un... » read more

Next-Gen Transistors


Nanosheets, or more generally, gate-all-around FETs, mark the next big shift in transistor structures at the most advanced nodes. David Fried, vice president of computational products at Lam Research, talks with Semiconductor Engineering about the advantages of using these new transistor types, along with myriad challenges at future nodes, particularly in the area of metrology. » read more

Blog Review: March 2


Arm's Charlotte Christopherson checks out SpiNNaker1, a project to develop a massively parallel, manycore supercomputer architecture that mimicked the interactions of biological neurons, and its follow up, SpiNNaker2, a hybrid system that combines statistical AI and neuromorphic computing. Cadence's Paul McLellan looks at open and generic PDKs that can be used by researchers and in education... » read more

Week In Review: Manufacturing, Test


Chipmakers, OEMs UMC plans to build a new fab next to its existing 300mm fab in Singapore. The new fab, called Fab12i P3, will manufacture wafers based on UMC’s 22nm/28nm processes. The planned investment for this project will be $5 billion. The first phase of this greenfield fab will have a monthly capacity of 30,000 wafers with production expected to commence in late 2024. To account fo... » read more

Transistors Reach Tipping Point At 3nm


The semiconductor industry is making its first major change in a new transistor type in more than a decade, moving toward a next-generation structure called gate-all-around (GAA) FETs. Although GAA transistors have yet to ship, many industry experts are wondering how long this technology will deliver — and what new architecture will take over from there. Barring major delays, today’s GAA... » read more

Blog Review: Feb. 23


Synopsys' Varun Agrawal looks at four new technologies have emerged to support the demands on 5G networks and applications, the challenges in validating all of those technologies together, and what's needed to perform end-to-end testing effectively for 5G O-RAN SoCs. Siemens EDA's Ray Salemi points to how FPGA retargeting could help address supply chain difficulties and some of the challenge... » read more

Silicon-based Power Semis Face Challenges


Suppliers of power semiconductors continue to develop and ship devices based on traditional silicon technology, but silicon is nearing its limits and faces increased competition from technologies like GaN and SiC. In response, the industry is finding ways to extend traditional silicon-based power devices. Chipmakers are eking out more performance and prolonging the technology, at least in th... » read more

Precision Selective Etch Tools Pave The Way For The Next Technology Inflection


Over the past decade, the need for increasingly smaller, denser, more powerful chips has been driving semiconductor manufacturers to move away from planar structures in favor of increasingly complex three-dimensional (3D) structures. Why? Simply put, stacking elements vertically enables greater density. Use of 3D architectures to support advanced logic and memory applications represents the ... » read more

A Sub-1 Hz Resonance Frequency Resonator Enabled By Multi-Step Tuning For Micro-Seismometer


We propose a sub-1 Hz resonance frequency MEMS resonator that can be used for seismometers. The low resonance frequency is achieved by an electrically tunable spring with an ultra-small spring constant. Generally, it is difficult to electrically fine-tune the resonance frequency at a near-zero spring constant because the frequency shift per voltage will diverge at the limit of zero spring const... » read more

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