Chip Industry Week In Review


Amkor will provide turnkey advanced packaging and test services to TSMC in Amkor's planned facility in Peoria, Arizona, in a deal announced on Thursday. The companies jointly specified the packaging technologies, such as TSMC’s Integrated Fan-Out (InFO) and Chip on Wafer on Substrate (CoWoS). President Biden signed into law a bill that exempts some semiconductor projects funded by the U.S.... » read more

Chip Industry Technical Paper Roundup: April 2


New technical papers recently added to Semiconductor Engineering’s library. [table id=211 /] Find last week’s technical paper additions here. » read more

Designing AI Hardware To Deal With Increasingly Challenging Memory Wall (UC Berkeley)


A new technical paper titled "AI and Memory Wall" was published by researchers at UC Berkeley, ICSI, and LBNL. Abstract "The availability of unprecedented unsupervised training data, along with neural scaling laws, has resulted in an unprecedented surge in model size and compute requirements for serving/training LLMs. However, the main performance bottleneck is increasingly shifting to memo... » read more

How Different Metal Depositions Affect The Structure And Charge Transport Of 9-A Graphene Nanoribbons


A technical paper titled “Contact engineering for graphene nanoribbon devices” was published by researchers at University of Arizona, Swiss Federal Labs for Materials Science and Technology, University of California Berkeley, Stanford University, SRM Institute of Science and Technology, Texas A&M University, Lawrence Berkeley National Laboratory (LBNL), Max Planck Institute for Polymer... » read more

Manufacturing Bits: Aug. 18


Quantum Internet The U.S. Department of Energy (DOE) recently unveiled a strategy to develop a quantum Internet in the United States. DOE’s 17 National Laboratories will serve as the backbone of the quantum Internet, which will rely on the laws of quantum mechanics to control and transmit information over a network. Currently in its initial stages of development, the quantum Internet coul... » read more

Manufacturing Bits: Sept. 1


Free-electron laser EUV consortium Extreme ultraviolet (EUV) lithography is delayed. Chipmakers hope to insert EUV at the 7nm node, but that’s not a given. As before, the big problem is the EUV light source. So far, the source can’t generate enough power to enable the required throughput for EUV in high-volume production. ASML’s current EUV source is operating at 80 Watts, up from 10 ... » read more