tag: lithography

Why New Photoresist Technology Is Critical
By Rich Wise - 18 Mar, 2021 - Comments: 0

As chipmakers move to advanced technology nodes, they are challenged to resolve ever finer features. One of the major roadblocks involves the material used to transfer chip design to the wafer. That material is rapidly reaching its limit to accurately transfer designs. To keep next-generation device scaling on track, a breakthrough technology has been introduced: dry resist. To better understan... » read more

Changing The Rules For Chip Scaling
By Ed Sperling - 10 Mar, 2021 - Comments: 0

Aki Fujimura, CEO of D2S, talks with Semiconductor Engineering about the incessant drive for chip density, how to improve that density through other means than just scaling, and why this is so important for the chip industry. » read more

200mm Demand Surges
By Mark LaPedus - 17 Dec, 2020 - Comments: 1

A surge in demand for various chips is causing shortages for select 200mm foundry capacity as well as 200mm fab equipment, and it shows no signs of abating in 2021. Foundry customers will face a shortfall of 200mm capacity at select foundries at least in the first half of 2021, and perhaps beyond. Those customers will need to plan ahead to ensure they obtain enough 200mm capacity in 2021. Ot... » read more

AI And High-NA EUV At 3/2/1nm
By Mark LaPedus - 16 Dec, 2020 - Comments: 1

Semiconductor Engineering sat down to discuss lithography and photomask issues with Bryan Kasprowicz, director of technology and strategy and a distinguished member of the technical staff at Photronics; Harry Levinson, principal at HJL Lithography; Noriaki Nakayamada, senior technologist at NuFlare; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. To vie... » read more

EUV Challenges And Unknowns At 3nm and Below
By Mark LaPedus - 19 Nov, 2020 - Comments: 1

The chip industry is preparing for the next phase of extreme ultraviolet (EUV) lithography at 3nm and beyond, but the challenges and unknowns continue to pile up. In R&D, vendors are working on an assortment of new EUV technologies, such as scanners, resists, and masks. These will be necessary to reach future process nodes, but they are more complex and expensive than the current EUV pro... » read more

Challenges Linger For EUV
By Mark LaPedus - 11 Nov, 2020 - Comments: 2

Semiconductor Engineering sat down to discuss lithography and photomask issues with Bryan Kasprowicz, director of technology and strategy and a distinguished member of the technical staff at Photronics; Harry Levinson, principal at HJL Lithography; Noriaki Nakayamada, senior technologist at NuFlare; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. To vie... » read more

Mask/Lithography Issues For Mature Nodes
By Mark LaPedus - 22 Oct, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss lithography and photomask issues with Bryan Kasprowicz, director of technology and strategy and a distinguished member of the technical staff at Photronics; Harry Levinson, principal at HJL Lithography; Noriaki Nakayamada, senior technologist at NuFlare; and Aki Fujimura, chief executive of D2S. What follows are excerpts of that conversation. ... » read more

eBeam Initiative Surveys Report Upbeat Photomask Market Outlook
By Jan Willis - 05 Oct, 2020 - Comments: 0

Every year, the eBeam Initiative conducts surveys that provide valuable insight into the key trends that are shaping the semiconductor industry. This year, industry luminaries representing 42 companies from across the semiconductor ecosystem participated in the 2020 eBeam Initiative Luminaries survey. 89% of respondents to the survey predict that photomask (mask) revenues in 2020 will stay the ... » read more

Challenges At 3/2nm
By Ed Sperling - 15 Sep, 2020 - Comments: 0

David Fried, vice president of computational products at Lam Research, talks about issues at upcoming process nodes, the move to EUV lithography and nanosheet transistors, and how process variation can affect yield and device performance. » read more

New Architectures, Much Faster Chips
By Ed Sperling and Ann Mutschler - 31 Aug, 2020 - Comments: 0

The chip industry is making progress in multiple physical dimensions and with multiple architectural approaches, setting the stage for huge performance increases based on more modular and heterogeneous designs, new advanced packaging options, and continued scaling of digital logic for at least a couple more process nodes. A number of these changes have been discussed in recent conferences. I... » read more

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