Scatterometry-Based Methodologies For Characterization Of MRAM Technology


Magnetoresistive random-access memory (MRAM) technology and recent developments in fabrication processes have shown it to be compatible with Si-based complementary metal oxide semiconductor (CMOS) technologies. The perpendicular spin transfer torque MRAM (STT-MRAM) configuration opened up opportunities for an ultra-dense MRAM evolution and was most widely adapted for its scalability. Insertion ... » read more

Will Floating Point 8 Solve AI/ML Overhead?


While the media buzzes about the Turing Test-busting results of ChatGPT, engineers are focused on the hardware challenges of running large language models and other deep learning networks. High on the ML punch list is how to run models more efficiently using less power, especially in critical applications like self-driving vehicles where latency becomes a matter of life or death. AI already ... » read more

Operator Anxiety


Are you one of the early pioneers who have purchased an electric car? In the United States in Q3 2022, 6% of new vehicle sales were pure electric models. Despite all the hype — and significant purchase subsidies in support of battery cars — today only 1% of the cumulative number of vehicles in service in the US are purely plug-in electric. One of the reasons electric car sales have not full... » read more

Industrial Solutions For Machine-Learning-Enabled Yield Optimization And Test


This article summarizes the content of a paper developed and presented by Advantest at ETS 2022. By Sonny Banwari and Matthias Sauer According to market research firm Gartner, Inc., in assessing the completion rate of data science projects, as well as the bottom-line value they generate for their companies, only between 15 and 20 percent of these projects are ever completed. Moreover, of ... » read more

Neural Architecture & Hardware Accelerator Co-Design Framework (Princeton/ Stanford)


A new technical paper titled "CODEBench: A Neural Architecture and Hardware Accelerator Co-Design Framework" was published by researchers at Princeton University and Stanford University. "Recently, automated co-design of machine learning (ML) models and accelerator architectures has attracted significant attention from both the industry and academia. However, most co-design frameworks either... » read more

Don’t Let Your ML Accelerator Vendor Tell You The ‘F-Word’


Machine learning (ML) inference in devices is all the rage. Nearly every new system on chip (SoC) design start for mobile phones, tablets, smart security cameras, automotive applications, wireless systems, and more has a requirement for a hefty amount of ML capability on-chip. That has silicon design teams scrambling to find ML processing power to add to the existing menu of processing engines ... » read more

Systematic Yield Issues Now Top Priority At Advanced Nodes


Systematic yield issues are supplanting random defects as the dominant concern in semiconductor manufacturing at the most advanced process nodes, requiring more time, effort, and cost to achieve sufficient yield. Yield is the ultimate hush hush topic in semiconductor manufacturing, but it's also the most critical because it determines how many chips can be profitably sold. "At older nodes, b... » read more

Automated Optical Inspection


Building good automated models for inspection require more data to be collected, both good and bad. Vijay Thangamariappan, R&D engineer at Advantest, explains how to develop models for automating optical inspection, using a multi-thousand pin socket as an example for how machine learning has helped reduce the return rate due to defects from 2% down to zero. He also explains how to achieve t... » read more

Complex Tradeoffs In Inferencing Chips


Designing AI/ML inferencing chips is emerging as a huge challenge due to the variety of applications and the highly specific power and performance needs for each of them. Put simply, one size does not fit all, and not all applications can afford a custom design. For example, in retail store tracking, it's acceptable to have a 5% or 10% margin of error for customers passing by a certain aisle... » read more

Training a ML model On An Intelligent Edge Device Using Less Than 256KB Memory


A new technical paper titled "On-Device Training Under 256KB Memory" was published by researchers at MIT and MIT-IBM Watson AI Lab. “Our study enables IoT devices to not only perform inference but also continuously update the AI models to newly collected data, paving the way for lifelong on-device learning. The low resource utilization makes deep learning more accessible and can have a bro... » read more

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