tag: memory

A New Dawn For IP
By Brian Bailey - 12 Dec, 2019 - Comments: 0

The IP industry is changing again. The concept started as build once, use everywhere, but today it is more like architect once, customize everywhere. Few designs can afford sub-optimal IP for their application. The need for customized IP is driven by both leading-edge designs and the trailing markets, although for different reasons. While this customization is causing IP companies to transfo... » read more

Machine Learning At The Edge
By Mentor, a Siemens Business - 12 Dec, 2019 - Comments: 0

Moving machine learning to the edge has critical requirements on power and performance. Using off-the-shelf solutions is not practical. CPUs are too slow, GPUs/TPUs are expensive and consume too much power, and even generic machine learning accelerators can be overbuilt and are not optimal for power. In this paper, learn about creating new power/memory efficient hardware architectures to meet n... » read more

Improving Reliability Monitoring Of High-Bandwidth Memory
By Eyal Fayneh - 10 Dec, 2019 - Comments: 0

As the quest for increased bandwidth and speed continues, multi-die technologies with advanced memory architectures are introduced. As the complexity of these heterogenous packaging continues to develop, new reliability challenges arise. A new approach to HBM subsystem monitoring and repair provides advanced in-field reliability assurance. By applying analytics to data created by on-chip Age... » read more

Why Standard Memory Choices Are So Confusing
By Ann Mutschler - 19 Nov, 2019 - Comments: 0

System architects increasingly are developing custom memory architectures based upon specific use cases, adding to the complexity of the design process even though the basic memory building blocks have been around for more than half a century. The number of tradeoffs has skyrocketed along with the volume of data. Memory bandwidth is now a gating factor for applications, and traditional memor... » read more

GDDR6 Pushes The Memory Envelope For AI And ADAS
By Frank Ferro - 14 Nov, 2019 - Comments: 0

Memory bandwidth is an ever-increasing critical bottleneck for a wide range of use cases and applications. These include artificial intelligence (AI), machine learning (ML), advanced driver-assistance systems (ADAS), as well as 5G wireless and wireline infrastructure. In addition to memory bottlenecks, the above-mentioned use cases and applications are rapidly hitting the real-world limits of t... » read more

Tricky Tradeoffs For LPDDR5
By Ann Mutschler - 30 Oct, 2019 - Comments: 0

LPDDR5 is slated as the next-gen memory for AI technology, autonomous driving, 5G networks, advanced displays, and leading-edge camera applications, and it is expected to compete with GDDR6 for these applications. But like all next-gen applications, balancing power, performance, and area concerns against new technology options is not straightforward. These are interesting times in the memory... » read more

Power/Performance Bits: Oct. 15
By Jesse Allen - 15 Oct, 2019 - Comments: 0

Probabilistic computing Researchers at Purdue University and Tohoku University built a hardware demonstration of a probabilistic computer utilizing p-bits to perform quantum computer-like calculations. The team says probabilistic computing could bridge the gap between classical and quantum computing and more efficiently solve problems in areas such as drug research, encryption and cybersecurit... » read more

Pushing Memory Harder
By Brian Bailey - 14 Oct, 2019 - Comments: 4

In an optimized system, no component is waiting for another component while there is useful work to be done. Unfortunately, this is not the case with the processor/memory interface. Put simply, memory cannot keep up. Accessing memory is slow, and it can consume a significant fraction of the power budget. And the general consensus is this problem is not going away anytime soon, despite effort... » read more

Solving The Memory Bottleneck
By Brian Bailey - 04 Oct, 2019 - Comments: 4

Chipmakers are scrambling to solve the bottleneck between processor and memory, and they are turning out new designs based on different architectures at a rate no one would have anticipated even several months ago. At issue is how to boost performance in systems, particularly those at the edge, where huge amounts of data need to be processed locally or regionally. The traditional approach ha... » read more

Memory Subsystems In Edge Inferencing Chips
By Ed Sperling - 23 Sep, 2019 - Comments: 0

Geoff Tate, CEO of Flex Logix, talks about key issues in a memory subsystem in an inferencing chip, how factors like heat can affect performance, and where these kinds of chips will be used. » read more

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