tag: memory

Foundries Prepare For Battle At 22nm
By Mark LaPedus - 19 Nov, 2018 - Comments: 0

After introducing new 22nm processes over the last year or two, foundries are gearing up the technology for production—and preparing for a showdown. GlobalFoundries, Intel, TSMC and UMC are developing and/or expanding their efforts at 22nm amid signs this node could generate substantial business for applications like automotive, IoT and wireless. But foundry customers face some tough choic... » read more

New Opportunities For OTP NVM
By Melissa Kirschner - 01 Nov, 2018 - Comments: 0

By 2020 more than 50 billion devices will be connected to the Internet, according to Cisco’s latest forecast. Smartphone traffic will exceed PC traffic and broadband speeds will nearly double by 2021. And by the next Winter Olympics (Beijing 2022), 1 trillion networked sensors could be embedded in the world around us. While tech experts offer slightly different projections of actual numbers,... » read more

Zeno Semi Expands On-Chip Memory
By Kevin Fogarty - 30 Oct, 2018 - Comments: 0

San Jose, Calif.-based startup Zeno Semiconductor is testing modifications and a smaller process node for the single-transistor 28nm SRAM chip it introduced in 2016, which could boost space for on-chip CPU memory by more than 2.5X, according to the co-founder and CEO of the company, Yuniarto Widjaja. The Zeno-1 transistor is built on standard CMOS processes, has a bi-stable bipolar transisto... » read more

3D NAND: Challenges Beyond 96-Layer Memory Arrays
By Steve Shih-Wei Wang - 24 Oct, 2018 - Comments: 0

Unlike scaling practices in 2D NAND technology, the direct way to reduce bit costs and increase chip density in 3D NAND is by adding layers. In 2013, Samsung shipped the first V-NAND product using 24 layers and MLC [1]. Five years later, in 2018, vendors of 3D-NAND have all announced production plans for 96-Layer NAND using TLC [2]. According to recent news reports, vendors are already working ... » read more

Digging Deep Into High Aspect Ratio Process Control For Memory Technology
By Mark Shirey - 18 Oct, 2018 - Comments: 0

By Mark Shirey and Janay Camp Data is an integral part of our lives. Contrary to the past, where files had to be removed periodically to free up storage space, we now assume that our data will never be deleted. Why risk deleting the wrong file? Just keep them! This new approach consumes a lot of memory, and intensifies the demand for storage. Two of the main workhorses of the memory segment ... » read more

Blog Review: Oct. 17
By Jesse Allen - 17 Oct, 2018 - Comments: 0

Arm's Shidhartha Das explores the challenges of power delivery in designing mobile systems and the importance of focusing on peak power consumption. Synopsys' Meenakshy Ramachandran explains the basics of Display Stream Compression and how it works to increase the effective bandwidth enabling support of high resolution displays. Cadence's Paul McLellan shares tips on more effective market... » read more

Making AI Run Faster
By Ed Sperling - 11 Oct, 2018 - Comments: 0

The semiconductor industry has woken up to the fact that heterogeneous computing is the way forward and that inferencing will require more than a GPU or a CPU. The numbers being bandied about by the 30 or so companies working on this problem are 100X improvements in performance. But how to get there isn't so simple. It requires four major changes, as well as some other architectural shifts. ... » read more

Blog Review: Oct. 10
By Jesse Allen - 10 Oct, 2018 - Comments: 0

In a video, Cadence's Megha Daga dives into sparsity in neural networks and how it affects bandwidth, performance, and power efficiency. In a video, Mentor's Colin Walls takes a look at efficient embedded code, and why that means different things at different times. Synopsys' Eric Huang argues that in the realm of video standards, HDMI, DisplayPort, and USB Type-C are set to continue comp... » read more

The Next Big Chip Companies
By Ed Sperling - 05 Oct, 2018 - Comments: 1

Rambus’ Mike Noonen looks at why putting everything on a single die no longer works, what comes after Moore’s Law, and what the new business model looks like for chipmakers. https://youtu.be/X6Kca8Vm-wA » read more

Hybrid Memory
By Ed Sperling - 13 Sep, 2018 - Comments: 0

Gary Bronner, senior vice president of Rambus Labs, talks about the future of DRAM scaling, why one type of memory won’t solve all needs, and what the pros and cons are of different memories. https://youtu.be/R0hhDx2Fb7Q » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy