Who will win in a world where architecture and packaging are now differentiators, and where intelligence, connectivity and security are the new prerequisites.
Rambus’ Mike Noonen looks at why putting everything on a single die no longer works, what comes after Moore’s Law, and what the new business model looks like for chipmakers.
Rising costs and gaps in equipment emerge as technology scales; new tools under development.
Explosion of data is forcing significant changes in where processing is done.
Experts at the Table, part 1: Shrinking features isn’t enough anymore. The big challenge now is how to achieve economies of scale and minimize complex integration issues.
New market opportunities and global competitiveness are limited by qualified people.
Researchers digging into ways around the von Neumann bottleneck.
The promise of advanced packaging is being able to integrate heterogeneous chips, but a lot of work is needed to make that happen.
Better algorithms and more data could bolster adoption, particularly at advanced nodes.
30 facilities planned, including 10/7nm processes, but trade war and economic factors could slow progress.
New architectures, packaging approaches gain ground as costs increase, but shrinking features continues to play a role.
Improvement still needed for uptime, defectivity, line edge roughness and process flows.
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OK, sure.
But, the time a wafer spends in the FAB has not changed. The nature of building a complex part is still limited by a system with a 5-10 month lead time from wafer start to finished product.
Come up with a way to JIT the inventory, and we can both get rich. That is the key to market risk and the reason not to have too many part numbers in fab at one time.