tag: memory

3 Big Bottlenecks For Design
By Ed Sperling - 09 Oct, 2014 - Comments: 0

Throughout the history of design for ICs, systems and software, bottlenecks emerge as one part of the design evolves more slowly than the next. It's frequently due to the fact that difficult engineering issues haven't been solved yet in one part of the design. Sometimes they can't be solved in a reasonable amount of time or for a reasonable amount of money and something else has to take its pla... » read more

Memory VIP
By Neill Mullinger - 09 Oct, 2014 - Comments: 0

As the consumer market, and the mobile segment in particular, continues to demand more features and more performance in their gadgets, the designer community is confronted with myriad challenges of delivering on those demands – not the least of which is verifying compliance of ever-evolving protocols that enable the connection of everything within the system on chip (SoC), and the connection ... » read more

Memory Directions Uncertain
By Brian Bailey - 09 Oct, 2014 - Comments: 0

Semiconductor Engineering sat down with a panel of experts to find out what is happening in world of memories. Taking part in the discussion are [getperson id="11073" comment="Charlie Cheng"], chief executive officer at [getentity id="22135" e_name="Kilopass Technology"]; Navraj Nandra, senior director of marketing for Analog/Mixed signal IP, embedded memories and logic libraries at [getentity ... » read more

Quantifying IP Entitlement For 14/16nm Technologies
By eSilicon - 24 Sep, 2014 - Comments: 0

The scaling benefits of [getkc id="74" comment="Moore"s Law"] are being seriously tested at 28nm. It is no longer a given that the cost per gate will go down at leading edge process nodes below 28nm, e.g., 20nm though 14nm. Rising design and manufacturing costs are contributing factors to this trend. Meanwhile, the competing trend of fewer but more complex [getkc id="81" comment="SoC"] (So... » read more

How Reliable Is Your IP?
By Ed Sperling - 12 Sep, 2014 - Comments: 0

Almost everyone who has bought a new smartphone, car, home electronics device or appliance either has experienced technical glitches that require a replacement or repair, or they know someone who has experienced these problems. The good news is that only a very small fraction of the electronic glitches or failures can be contributed to hardware design. Most of it is due to manufacturing vari... » read more

Collaboration Accelerates Moore’s Law
By Joe Gullo - 11 Sep, 2014 - Comments: 0

Moore's Law dictates that the number of transistors in dense, integrated circuits will double approximately every two years. Maintaining this pace of scaling, however, has become increasingly difficult given the ever-increasing complexity inherent with new chip starts. Additionally, the cost of using leading-edge process technology is prohibitively expensive. As a result, collaboration amon... » read more

Implementation Challenges And Solutions Of Low-Power, High-Performance Memory Systems
By Rambus - 10 Sep, 2014 - Comments: 0

Mobile devices and their demand for rapid innovation have fundamentally and forever changed the semiconductor industry. These devices have fueled tremendous innovation in the last few years to bring about drastic improvements in performance, power and cost efficiency. They also demand condensed product development cycles which accelerate the rate and need for innovation. The only thing that has... » read more

What Happened To Next-Gen Lithography?
By Mark LaPedus - 03 Sep, 2014 - Comments: 2

Chipmakers continue to march down the process technology curve. Using today’s optical lithography and multiple patterning, the semiconductor industry is scaling its leading-edge devices far beyond what was once considered possible. The question is how far can the industry extend 193nm immersion [getkc id="80" comment="lithography"] and multiple patterning before these technologies become t... » read more

What’s Next For Memory?
By Mark LaPedus - 14 Aug, 2014 - Comments: 4

Apple, Samsung and others are developing the next wave of smartphones and tablets. OEMs want to integrate new memory schemes that provide more bandwidth at lower power. But there are some challenges in the arena that are prompting memory makers to rethink their mobile DRAM roadmaps. The conventional wisdom was that memory makers would ship mobile DRAMs based on the new LPDDR4 interface stand... » read more

Server Memory: Should We Be Concerned About The Power?
By Loren Shalinsky - 07 Aug, 2014 - Comments: 0

After my last blog post, Server Memory: What Drives its Growth, I had a couple of people ask me, “If server memory has increased by so much in the last four years, what effect has that had on the server memory subsystem power consumption?” It’s a good question. In last month’s blog, I calculated that the maximum memory per CPU has increased from 18GB (2010, highest-end Nehalem 45nm C... » read more

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