tag: Mentor Graphics

Key Developments In 2013 And Crystal Ball Predictions For 2014
By Graham Bell - 19 Dec, 2013 - Comments: 0

There were a number of key developments in 2013 that stood out for me that I think would of interest to the Semiconductor Engineering audience:  We are now in the world of 8-core processors. Both the new Xbox One and the Sony PS4 sport 8-core AMD CPUs. And MediaTek has announced the MT6592, the first 8-core cell-phone chip that uses ARM A-7 processors running simultaneously at 2GHz. I know... » read more

Blog Review: Dec. 18
By Ed Sperling - 18 Dec, 2013 - Comments: 0

Cadence’s Brian Fuller looks back at electronics innovation this past year from the perspective of a 2012 event—with a heavy emphasis on going vertical in both chip architectures, transistors and in business. Things are looking up, sort of. Mentor’s Colin Walls finds social media is getting much more interesting. As proof, he’s joined a discussion about embedded C programming and st... » read more

Is There Light At The End Of Moore’s Tunnel?
By Brian Bailey - 18 Dec, 2013 - Comments: 2

Last month’s article, “Is There Light At The End Of Moore’s Tunnel,” examined the state of the industry in terms of integrating photonics components onto silicon. It concentrated on the piece that has been the hardest to achieve – the laser. However, as realizing that integration goal has become closer to reality, it has also waned in terms of the number of people who believe it is th... » read more

Modern IC Packaging
By Various Writers - 18 Dec, 2013 - Comments: 0

Modern IC packaging technologies, such as 3D-IC, drive the need for IC, package and system co-design tools and methodologies. To download this white paper, click here.  » read more

Mentor Buys Oasys Assets For Digital Implementation
By Ann Mutschler - 17 Dec, 2013 - Comments: 0

Bolstering its bid in the digital implementation flow as well as positioning itself squarely against EDA leaders Cadence and Synopsys in the RTL synthesis arena, Mentor Graphics this afternoon announced it has acquired ‘certain assets’ of Oasys Design Systems for its RealTime RTL physical synthesis technology. This acquisition aligns with Mentor’s goal to deliver a best-in-class digita... » read more

Automatic Macro Placement for Advanced Nodes
By Various Writers - 13 Dec, 2013 - Comments: 0

Finding the best placement for macros on a modern SoC can be serious challenge to design quality and cycle time.The Olympus-SoC place and route platform offers an automated and powerful solution for automatic macro placement (AMP) that significantly reduces the iterations and cycle time required to arrive at the optimal macro configuration. This paper describes the Olympus-SoC AMP technology an... » read more

Can Intel Dethrone The Foundry Giants?
By Mark LaPedus - 12 Dec, 2013 - Comments: 3

The leading-edge foundry business isn’t for the faint of heart. It requires deep pockets and sound technology to keep pace in the chip-scaling race. And despite pouring billions of dollars into new fabs and processes, foundries are competing for fewer customers at each node. Given the difficult business conditions, only a handful of vendors can afford to compete in the high-end foundry bus... » read more

DSA, Multi-beam Make Steady Progress
By Mark LaPedus - 12 Dec, 2013 - Comments: 0

Semiconductor Engineering sat down to discuss current and future lithography challenges with Laurent Pain, lithography lab manager at CEA-Leti. What follows are excerpts of that conversation. SE: CEA-Leti has two major programs in lithography. One is in directed self-assembly (DSA) and the other is in multi-beam e-beam. Let’s start with multi-beam. What is Leti doing in multi-beam and what... » read more

Experts At The Table: Yield And Reliability Issues With Integrating IP
By Ed Sperling - 12 Dec, 2013 - Comments: 0

Semiconductor Engineering sat down to discuss the impact of integrating IP in complex SoCs with Juan Rey, senior director of engineering at Mentor Graphics; Kevin Yee, product marketing director for Cadence’s SoC Realization Group; and Mike Gianfagna, vice president of marketing at eSilicon. What follows are excerpts of that conversation. SE: As more pieces are integrated into complex SoCs... » read more

Blog Review: Dec. 11
By Ed Sperling - 11 Dec, 2013 - Comments: 0

Synopsys’ Brent Gregory has developed a career growth checklist for computer science majors. They should hang this in the hallway at universities. Cadence’s Brian Fuller interviews Saar Drimer, a UK hardware engineer who has been experimenting with odd-shaped PCBs. According to Drimer, 45-degree angles aren’t always optimal. But what happens to all the expensive tools everyone has bee... » read more

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