tag: Mentor Graphics

IP Risk Sharing
By Brian Bailey - 10 Mar, 2016 - Comments: 0

For most people within the semiconductor industry, managing risk involves making the right product decisions that will enable a company to be profitable, and ensuring the product is successfully produced within the necessary time window. In contrast, for products within high-risk areas such as medical and mil/aero, design often proceeds at a slower pace, using proven technologies and adopting l... » read more

Mixed-Signal Design Powers Ahead
By Ann Mutschler - 10 Mar, 2016 - Comments: 1

Mixed-signal devices are at the heart of many advanced systems today because of the need to interact with the outside world, but designing and verifying these systems is getting harder. There are several reasons for this. First, almost all of these devices now have to be lower power than in the past, and in the analog space it's not as simple as just dialing down part of a block. Second, it ... » read more

Power Analysis Plus Power Management
By Ellie Burns - 10 Mar, 2016 - Comments: 0

In my earlier blogs we've heard from some of the experts on using UPF in the successive refinement flow. We’ve talked about controlling leakage power, bringing power down, and validating power management behavior using coverage and simulation, including debug and clock domain crossing verification. In order to do the last step in the successive refinement flow, you need to use emulation be... » read more

Verification Facing Unique Inflection Point
By Brian Bailey - 10 Mar, 2016 - Comments: 0

The Design and Verification Conference and Exhibition (DVCon) attracted more than 1,100 people to San Jose last week, just slightly less than last year. While a lot of focus, and most of the glory, goes to design within semiconductor companies, it is verification where most of the advancements are happening and thus the bigger focus for DVCon. The rate of change in verification and the producti... » read more

How Many Cores? (Part 1)
By Ed Sperling - 10 Mar, 2016 - Comments: 2

The optimal number of processor cores in chip designs is becoming less obvious, in part due to new design and architectural options that make it harder to draw clear comparisons, and in part because just throwing more cores at a problem does not guarantee better performance. This is hardly a new problem, but it does have a sizable list of new permutations and variables—right-sized heteroge... » read more

Power — Usage Shift Leads to Methodology Shift
By Mentor, a Siemens Business - 09 Mar, 2016 - Comments: 0

Power exploration and accurate power calculation of SoCs in the target application environment is getting executive attention due to the fact that companies are missing market windows because of power issues. This makes system-level power analysis and management a key measurement. Verification solutions that provide accurate power analysis data early are critical to making design decisions that... » read more

Enabling Self-Driving Cars
By Ann Mutschler - 09 Mar, 2016 - Comments: 1

To enable truly self-driving cars — the ones without a gearshift or a steering wheel — there must be a confluence of technologies, a refinement of the business models, regulatory and safety requirements, and insurance concerns. So how close is the automotive ecosystem to reaching the goal of truly autonomous driving? That depends on your vantage point. As far as where automakers are t... » read more

Blog Review: March 9
By Jesse Allen - 09 Mar, 2016 - Comments: 0

The world's largest floating solar farm will soon be complete – an array of 23,000 solar panels on a reservoir outside London. Also in this week's top five picks by Ansys' Justin Nescott, watching sharks from the sky is a drone's latest task, plus making music with a marble machine. Synopsys' Graham Etchells continues his series with a look at electromigration and its impacts on the FinFET... » read more

7nm Lithography Choices
By Mark LaPedus - 07 Mar, 2016 - Comments: 2

Chipmakers are ramping up their 16nm/14nm logic processes, with 10nm expected to move into early production later this year. Barring a major breakthrough in lithography, chipmakers are using today’s 193nm immersion and multiple patterning for both 16/14nm and 10nm. Now, chipmakers are focusing on the lithography options for 7nm. For this, they hope to use a combination of two technologies ... » read more

The Week In Review: Design/IoT
By Jesse Allen - 04 Mar, 2016 - Comments: 0

Mergers & Acquisitions Synopsys acquired WinterLogic, provider of fault simulation tools used in automotive, safety and security environments for the design and verification of advanced SoCs. In announcing the deal, Synopsys highlighted fault simulation as key for ISO 26262 compliance testing. Terms were not disclosed. IP & IoT Mentor Graphics unveiled the first entirely native... » read more

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