tag: Mentor

Week In Review: Design, Low Power
By Jesse Allen - 15 Apr, 2022 - Comments: 0

Ansys will acquire cloud simulation provider OnScale. OnScale's technology will be used to provide a cloud-native, web-based UI for device-independent access to Ansys’ simulation technologies as well as creation of simulation-based vertical applications. “OnScale’s cloud-native technology combines the limitless compute power of cloud supercomputers with an intuitive web-based front end, m... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 15 Apr, 2022 - Comments: 0

Automotive, mobility An engine-sensor malfunction in three popular Japanese-versions of the Subaru models has forced the company to suspend production temporarily in Japan, according to Reuters. The sensor in the CB18 engine, found in Japan’s Forester, Outback, and Levor cars, stops the engine from starting and flashes a warning light. In North America, Subaru is adding a wide-angle mono cam... » read more

Always-On, Ultra-Low-Power Design Gains Traction
By Ann Mutschler - 14 Apr, 2022 - Comments: 0

A surge of electronic devices powered by batteries, combined with ever-increasing demand for more features, intelligence, and performance, is putting a premium on chip designs that require much lower power. This is especially true for always-on circuits, which are being added into AR/VR, automotive applications with over-the-air updates, security cameras, drones, and robotics. Also known as ... » read more

Reliable DRC Voltage Text Annotation Means Faster And More Accurate DRC Verification
By Abdellah Bakhali - 14 Apr, 2022 - Comments: 0

As the potential for complex interactions between voltage domains grows significantly with the increase in design density at each new process node, the complexity of spacing checks in design rule checking (DRC) also increases. To minimize these types of risk, many simple spacing checks have evolved to become voltage-aware DRC (VA-DRC) checks that incorporate voltage values to determine the requ... » read more

Architecting Faster Computers
By Brian Bailey - 14 Apr, 2022 - Comments: 3

To create faster computers, the industry must take a major step back and re-examine choices that were made half a century ago. One of the most likely approaches involves dropping demands for determinism, and this is being attempted in several different forms. Since the establishment of the von Neumann architecture for computers, small, incremental improvements have been made to architectures... » read more

Automated DRC Voltage Annotation Provides Faster And More Accurate Verification For Voltage-Aware Spacing Rules
By Siemens EDA - 13 Apr, 2022 - Comments: 0

Accurate and repeatable reliability verification is now essential for both advanced node designs and the increasingly complex products being produced at established nodes. To ensure compliance with all process, reliability, and power management requirements, voltage-aware DRC applies variable spacing requirements, based on either the absolute voltage or delta voltage values, to accurately evalu... » read more

Blog Review: April 13
By Jesse Allen - 13 Apr, 2022 - Comments: 0

Synopsys' Scott Durrant, Priyank Shukla, Mitch Heins, and Jigesh Patel provide a brief overview of the history of copper and optical interconnects used in data centers, the limitations of existing interconnect solutions, and the future of co-packaged optics. Siemens' Trey Reeser finds that it's not only necessary for semiconductor companies to address the safety and security of products for ... » read more

Automation Of Shared Bus Memory Test With Tessent MemoryBIST
By Siemens EDA - 12 Apr, 2022 - Comments: 0

New requirements in automotive, artificial intelligence (AI), and processor applications have resulted in increased use of memory-heavy IP. Memory-heavy IPs for these applications are optimized for high performance, and they will often have a single access point for testing the memories. Tessent MemoryBIST provides an out-of-the-box solution for using this single access point, or shared bus int... » read more

Finding And Applying Domain Expertise In IC Analytics
By Anne Meixner - 12 Apr, 2022 - Comments: 0

Behind PowerPoint slides depicting the data inputs and outputs of a data analytics platform belies the complexity, effort, and expertise that improve fab yield. With the tsunami of data collected for semiconductor devices, fabs need engineers with domain expertise to effectively manage the data and to correctly learn from the data. Naively analyzing a data set can lead to an uninteresting an... » read more

Automate Memory Test Through A Shared Bus Interface
By Harshitha Kodali - 12 Apr, 2022 - Comments: 0

The use of memory-heavy IP in SoCs for automotive, artificial intelligence (AI), and processor applications is steadily increasing. However, these memory-heavy IP often have only a single access point for testing the memories. A shared bus architecture allows testing and repairing memories within IP cores through a single access point referred to as a shared bus interface. Within this interface... » read more

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