tag: Mentor

MRAM Getting More Attention At Smallest Nodes
By Karen Heyman - 10 Aug, 2023 - Comments: 2

Magneto-resistive RAM (MRAM) appears to be gaining traction at the most advanced nodes, in part because of recent improvements in the memory itself and in part because new markets require solutions for which MRAM may be uniquely qualified. There are still plenty of skeptics when it comes to MRAM, and lots of potential competitors. That has limited MRAM to a niche role over the past couple de... » read more

Fast, Accurate, Automated Via Insertion During Design Implementation Requires Foundry Rule Compliance
By Jimmy Tien - 10 Aug, 2023 - Comments: 0

As the scaling of silicon technology proceeds, via resistance is becoming a dominant factor in integrated circuit (IC) yield, performance, and reliability. At advanced nodes, interconnects and via dimensions decrease, while the number of metallization layers increases. To moderate the impact of via resistance on yield and reliability and reduce electromigration (EM) and voltage drop (IR) effect... » read more

Blog Review: Aug. 9
By Jesse Allen - 09 Aug, 2023 - Comments: 0

Synopsys' John Swanson and Manmeet Walia note that designing for 224G Ethernet will entail some unique considerations, as design margins will be extremely tight, making it mission-critical to optimize individual analog blocks to reduce impairments. Cadence's Rick Sanborn finds that knowing how best to debug common partitioning-related issues and implicitly control them using common features ... » read more

Chiplets: Deep Dive Into Designing, Manufacturing, And Testing
By The SE Staff - 07 Aug, 2023 - Comments: 0

Chiplets are a disruptive technology. They change the way chips are designed, manufactured, tested, packaged, as well as the underlying business relationships and fundamentals. But they also open the door to vast new opportunities for existing chipmakers and startups to create highly customized components and systems for specific use cases and market segments. This LEGO-like approach sounds ... » read more

Creating IP In The Shadow Of ISO 26262
By Karen Heyman - 03 Aug, 2023 - Comments: 0

On many levels, designing IP for the automotive sector is similar to targeting aerospace or medical devices — human lives are at risk if something goes wrong, and the list of regulations is significant. In practice, it can turn an interesting chip design project into a complex and often frustrating checklist exercise. In the case of ISO 26262, that includes a 12-part standard for automotiv... » read more

A Survey Of Machine Learning Applications In Functional Verification
By Siemens EDA - 02 Aug, 2023 - Comments: 0

Functional verification is computationally and data-intensive by nature, making it a natural target of machine learning applications. This paper provides a comprehensive and up-to-date analysis of FV problems addressable by ML. Among the various ML techniques and algorithms, several emerging ones have demonstrated outstanding potential in FV. Yet despite the promising research results, criti... » read more

Blog Review: Aug. 2
By Jesse Allen - 02 Aug, 2023 - Comments: 0

Siemens' Katie Tormala points to the need for die attach thermal testing to ensure efficient removal of heat dissipation from power electronics components to prevent premature failure or thermal runaway. Synopsys's Dermott Lynch notes that over 30% of semiconductor failures are attributed to electrostatic discharge, with damage ranging from leakages and shorts to junction and metallization b... » read more

Week In Review: Design, Low Power
By Susan Rambo - 28 Jul, 2023 - Comments: 0

Arm is helping to address the ongoing talent shortage through its newly announced Semiconductor Education Alliance, with a long list of partners, including Arduino, Cadence, Cornell University, Semiconductor Research Corp., STMicroelectronics,Synopsys, Taiwan Semiconductor Research Institute, the All-India Council for Technical Education, and the University of Southampton. The Alliance... » read more

Shift Left, Extend Right, Stretch Sideways
By Brian Bailey - 27 Jul, 2023 - Comments: 0

The EDA industry has been talking about shift left for a few years, but development flows are now being stretched in two additional ways, extending right to include silicon lifecycle management, and sideways to include safety and security. In addition, safety and security join verification and power as being vertical concerns, and we are increasingly seeing interlinking within those concerns. ... » read more

The Good And Bad Of Chip Design On Cloud
By Ann Mutschler - 27 Jul, 2023 - Comments: 0

Semiconductor Engineering sat down to talk about how the shift toward chip design on cloud has sped up, whether the benefits of cloud are realized in chip design, and some of the most pressing challenges to chip design on cloud today, with Philip Steinke, fellow, CAD infrastructure and physical design at AMD; Mahesh Turaga, vice president of business development for cloud at Cadence Design Syst... » read more

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