Chip Industry Week In Review

By The SE Staff - 13 Oct, 2023 - Comments: 0

By Liz Allan, Jesse Allen, and Karen Heyman. Canon uncorked a nanoimprint lithography system, which the company said will be useful down to about the 5nm node. Unlike traditional lithography equipment, which projects a pattern onto a resist, nanoimprint directly transfers images onto substrates using a master stamp patterned by an e-beam system. The technology has a number of limitations and... » read more

RISC-V Wants All Your Cores

By Brian Bailey - 12 Oct, 2023 - Comments: 0

RISC-V is no longer content to disrupt the CPU industry. It is waging war against every type of processor integrated into an SoC or advanced package, an ambitious plan that will face stiff competition from entrenched players with deep-pocketed R&D operations and their well-constructed ecosystems. When Calista Redmond, CEO for RISC-V International, said at last year's summit that RISC-V w... » read more

Partitioning Processors For AI Workloads

By Ann Mutschler - 12 Oct, 2023 - Comments: 0

Partitioning in complex chips is beginning to resemble a high-stakes guessing game, where choices need to extrapolate from what is known today to what is expected by the time a chip finally ships. Partitioning of workloads used to be a straightforward task, although not necessarily a simple one. It depended on how a device was expected to be used, the various compute, storage and data paths ... » read more

CXL: The Future Of Memory Interconnect?

By Karen Heyman - 12 Oct, 2023 - Comments: 1

Momentum for sharing memory resources between processor cores is growing inside of data centers, where the explosion in data is driving the need to be able to scale memory up and down in a way that roughly mirrors how processors are used today. A year after the CXL Consortium and JEDEC signed a memorandum of understanding (MOU) to formalize collaboration between the two organizations, suppor... » read more

Do You Really Understand The Importance Of Parasitic Extraction In Chip Designs?

By Karen Chow - 12 Oct, 2023 - Comments: 0

By Susanne Lachenmann and Petya Aleksandrova, Infineon Technologies, and Karen Chow, Siemens EDA One of the biggest challenges integrated circuit (IC) designers face in today’s complex designs is effectively managing the effects of parasitic elements such as resistance, capacitance, and inductance. Parasitic elements can significantly impact chip performance of a chip, making it critical f... » read more

The Value Of Field Solvers In Semiconductor Development Helps Drive Infineon Innovation

By Siemens EDA - 11 Oct, 2023 - Comments: 0

Parasitic extraction (PEX) helps ensure accurate circuit performance in the design and verification flow. Development of accurate PEX runsets depends on accurate and precise extraction results obtained using a full-featured field solver. Infineon selected the Calibre xACT 3D tool as their reference field solver tool of choice in the development of their next-generation semiconductor power produ... » read more

Blog Review: October 11

By Jesse Allen - 11 Oct, 2023 - Comments: 0

Cadence's Sangeeta Soni examines Integrity and Data Encryption (IDE) verification considerations for Compute Express Link (CXL) devices, including MAC generation and handling, key programming and exchange, and early MAC termination. Synopsys' Madhumita Sanyal points to how the increased bandwidth of PCIe 6.0 supports the demanding requirements of AI accelerators. Siemens' Kevin Webb expla... » read more

Chip Industry Week In Review

By The SE Staff - 06 Oct, 2023 - Comments: 0

By Jesse Allen, Liz Allan, and Gregory Haley A potential government shutdown beginning in November would be "massively disruptive" for the Commerce Department as it continues to disburse critical funding featured in the CHIPS Act to boost semiconductor research and development in the U.S., according to Secretary Gina Raimondo. Global semiconductor industry sales totaled $44 billion in Aug... » read more

Simplifying Power Module Verification Using Compliance Checking

By Wilfried Wessel - 05 Oct, 2023 - Comments: 0

By Wilfried Wessel, Siemens EDA; Simon Liebetegger, University of Applied Sciences, Darmstadt; and Florian Bauer, Siemens EDA Current simulation and verification methods for power modules are time-consuming. Each domain has specific solutions based on finite elements analysis, computational fluid dynamics and solvers for electric circuits like SPICE. This article investigates if it is possib... » read more

How Much AI Is Really Needed?

By John Koon - 05 Oct, 2023 - Comments: 0

Tensor Core GPUs have created a generative AI model gold rush. Whether it’s helping students with math homework, planning a vacation, or learning to prepare a six-course meal, generative AI is ready with answers. But that's only one aspect of AI, and not every application requires it. AI — now an all-inclusive term, referring to the process of using algorithms to learn, predict, and make... » read more

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